SoC Solutions Architect – PCIe/CXL/UAL/DMA - San Jose

We are looking for a SoC Architect to join the team in defining the next generation of Adaptive and Embedded SoCs. You will drive novel SoC architecture solutions across a wide range of applications, including Embedded Computing, AI/ML, Data Center, Communications, Automotive, an ...

Dice is the leading career destination for tech experts at every stage of their careers. Our client, Anagha Techno Soft, is seeking the following. Apply via Dice today · Senior Linux Kernel Engineer – Memory Management & PCIe/CXL (Not Admin) · San Jose, CA (Onsite) (Preferred - L ...

Dice is the leading career destination for tech experts at every stage of their careers. Our client, Anagha Techno Soft, is seeking the following. Apply via Dice today · Senior Linux Kernel Engineer – Memory Management & PCIe/CXL (Not Admin) · San Jose, CA (Onsite) (Preferred - L ...

Join AMD to architect and develop cutting-edge hardware/software co-design solutions for FPGA-based acceleration across a wide range of applications. You will design high-performance hardware acceleration engines and embedded software that orchestrates them, enabling next-generat ...

This is a RTL Design Engineer position requiring participation in technical roles throughout product development cycles. · FPGA Experience in design, simulation, synthesis, implementation · ...

+6 Months Contract Participate in technical role in all phases of the product development cycle through implementation, prototyping, validation, productization and support including but not limited to architecture, design. · FPGA experience in design, simulation, synthesis, · TC ...

The job requires FPGA design engineering skills with experience in RTL design, simulation synthesis implementation and TCL Python coding. · Participate in technical roles through product development cycle. · Design verify validate high-performance logic using System Verilog/Veril ...

Participate in technical role in all phases of the product development cycle including architecture design documentation for Ips. · Design verify and validate high-performance logic using System Verilog/Verilog. · Perform pre-silicon verification emulation to ensure functional co ...

Rtl design engineer position available. · Design verify and validate high-performance logic using System Verilog/Verilog · • Implement interfaces for PCIe Gen 7 UAL Ethernet and DDR56 · ...

FPGA/RTL Design Engineer at Dexian DISYS in San Jose CA. · Participate in all phases of product development cycle including architecture design prototyping validation productization and support of IPs. · Design verify and validate high-performance logic using SystemVerilog/Verilo ...

FPGA/RTL Design Engineer required for product development cycle including architecture design prototyping validation productization and support of IPs. · Design verify and validate high-performance logic using SystemVerilog/Verilog. · Utilize Vivado Vitis ecosystems to integrate ...

We are looking for RTL Design Engineer - Intermediate for our client in San Jose, CA Participate in technical role in all phases of the product development cycle through implementation prototyping validation productization and support including but not limited to architecture des ...

Dice is the leading career destination for tech experts at every stage of their careers. Our client, Anagha Techno Soft, is seeking the following. Apply via Dice today · Job Overview · As a Senior Engineer in the Systems Software team, you will drive the software-hardware co-desi ...

Dice is the leading career destination for tech experts at every stage of their careers. Our client, Proventus Metrics, is seeking the following. Apply via Dice today · Here is OUR CLIENT REQUIREMENT which can be filled immediately. · Position: Senior Software Engineer Linux Kern ...

· Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Conne ...

+Design RTL circuits using System Verilog/Verilog and integrate custom IP with the Network on Chip (NoC), Memory and other subsystems. · +Participate in technical role in all phases of the product development cycle through implementation, prototyping, validation, productization a ...

Participate in technical role in all phases of the product development cycle through implementation prototyping validation productization and support including but not limited to architecture design and documentation for Ips. · ...

This is an intermediate RTL design engineer position at TekWissen for Client in San Jose CA 6+ months onsite temporary assignment payrate onsite · ...

TekWissen is a global workforce management provider headquartered in Ann Arbor, Michigan that offers strategic talent solutions to our clients world-wide. This Client is an American multinational semiconductor company based in Santa Clara, California, that develops computer proce ...

Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs' Intelligent Connecti ...