Mirafra Technologies Jobs in United States

++EMULATION Engineer-HAPS · +Experience building Synopsys HAPS models at the SoC and IP level. · Develop transactors for emulation models. · Automation support for emulation build and release. · ...

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The ideal candidate will have a good understanding of design specifications and experience with SOC Design and Physical Design flows. · Work with design teams across various disciplines to ensure designs converge and integrate in a timely manner. · ...

Job Description: · ◦ Experience with Integration for STA: including Hyperscale and hierarchical analysis with parasitic stitching, IO budgeting, and flat parasitic extraction. · ◦ Timing closure with various timing ECO including transition, setup, hold, noise, crosstalk, and powe ...

Job Description: · ◦ Experience with Integration for STA: including Hyperscale and hierarchical analysis with parasitic stitching, IO budgeting, and flat parasitic extraction. · ◦ Timing closure with various timing ECO including transition, setup, hold, noise, crosstalk, and powe ...

As a seasoned Hardware Program Manager, you will excel at multitasking to oversee multiple geographically diverse projects in various stages of completion. You will lead cross-functional team meetings to develop project schedules, resource plans, key performance metrics, and over ...

The Emulation Engineer will be responsible for building Synopsys HAPS models at the SoC and IP level. · ...

Experience in ARM based CPU sub-system design specially with Synopsys ARC. · ...

Experience building Synopsys HAPS models at the SoC and IP level. · ...

You are skilled at multitasking to manage multiple geographically diverse projects at various completion phases simultaneously. You organize and lead cross-functional team meetings to develop project schedules, resource plan, functional team key performance metrics and overall pr ...

**Senior Design Verification Engineer at Mirafra Technologies** · Job Overview: · Mirafra Technologies is seeking a highly skilled Senior Design Verification Engineer to join our team. As a key member of our verification group, you will be responsible for designing and implementi ...

Job Description: · Strong Logic Design, RTL coding (Verilog HDL) and debugging skills · Analyze and resolve Lint, CDC and RDC issues in the design · Understanding of low power design and validation techniques including UPF · Experience with constraint generation, timing closure a ...

We seek a highly skilled GPU design verification engineer to join our team at Samsung SARC/ACL. · ...

Emulation Engineer- Haps · Experience building Synopsys HAPS models at the SoC and IP level · Develop transactors for emulation models. · ...

Experience: 6 to 15+ years of experience. · Job Requirements are as below: · Architect block and full-chip verification environments using HVLs and constrained random · techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA · ○ Deve ...

body{font-family:Arial;font-size:12px;}**RTL Design Engineer Role at Mirafra Technologies** · Mirafra Technologies is seeking an experienced RTL Design Engineer to join our team. This role will involve working on the design of System IP blocks, collaborating with other designers ...

Top 5 Required Skills · ERP Oracle Application Functional Finance consultant - General Ledger, SLA, Accounts Payable, Accounts Receivable, Fixed Assets, Tax (EbTax & Vertex) 2. Finance domain knowledger 3. Working knowledge in writing SQL queries 4. Exposure to Mergers & Acquisit ...

Experience: 10+ years of experience. · Job Requirements are as below: · Architect block and full-chip verification environments using HVLs and constrained random · techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA · ○ Develop te ...

As a Physical Design Engineer, you will work closely with the silicon and hardware R&D team to develop and implement novel thermodynamic computing architectures. · ...

You are skilled at multitasking to manage multiple geographically diverse projects at various completion phases simultaneously. · ...