Senior RTL Engineers - San Jose

We are seeking an RTL engineer to develop high-fidelity, advanced IP-level power macromodels for C-HBM component IPs including TSV interconnects. · We are seeking an experienced RTL designer with a strong background in digital design and verification. The ideal candidate will ha ...

We are seeking an RTL engineer to develop high-fidelity, advanced IP-level power macromodels for AI computing memory component IPs.The role focuses on translating RTL/SystemC/C behavior into time-indexed, input-dependent power models. · Location: Daily onsite presence at our San ...

Work with Architects, Chip Leads, and Customers on SOC IP design. · ...

+ Develop high-fidelity power macromodels + Extract activity-, value-, and state-dependent power features from C/SystemC/RTL simulations + Define power-relevant functional states (transaction/state-based abstraction) · Bachelors degree 5+ years of experience or Masters degree 3+ ...

We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We're dedicated to empowering people to be their true selves. · ...

+ Develop high-fidelity IP-level power macromodels for C-HBM component IPs · + Extract activity-, value-, and state-dependent power features from simulations · Job summary: We are seeking an RTL engineer to develop advanced power models for HBM component IPs in our San Jose off ...

We are seeking an RTL engineer to develop high-fidelity, advanced IP-level power macromodels for AI computing memory component IPs. · Develop high-fidelity, advanced RTL- SystemC-, and C-based power macromodels for AI memory component IPs using analytical modeling, LUT, FSM, NN, ...

We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, · and inclusive of diverse perspectives. · Collaborate with the design team to drive continuous improvements in front-end ...

As an RTL Engineer at Etched you will develop and implement design verification strategies for both our existing and upcoming ASIC designs. · ...

This position is responsible for debugging timing/area/congestion issues and working with RTL & Physical designers to resolve them. · Debug the timing/area/congestion issues and work with RTL & Physical designers to resolve them. · Run Formal Verification checks between RTL and G ...

The RTL Synthesis Engineer will debug timing/area/congestion issues and work with RTL & Physical designers to resolve them. · ...

We are looking for RTL Design Engineer - Intermediate for our client in San Jose, CA Participate in technical role in all phases of the product development cycle through implementation prototyping validation productization and support including but not limited to architecture des ...

FPGA/RTL Design Engineer to design, implement, and validate digital circuits and FPGA-based solutions. · ...

Rtl design engineer position available. · Design verify and validate high-performance logic using System Verilog/Verilog · • Implement interfaces for PCIe Gen 7 UAL Ethernet and DDR56 · ...

As an RTL Engineer at Etched you will develop and implement design verification strategies for both our existing and upcoming ASIC designs working closely with state-of-the-art architectures for machine learning. · ...

This role involves hands-on development using RTL languages and FPGA design tools while also supporting customers and creating technical assets that enable successful adoption of our products. · ...

+6 Months Contract Participate in technical role in all phases of the product development cycle through implementation, prototyping, validation, productization and support including but not limited to architecture, design. · FPGA experience in design, simulation, synthesis, · TC ...

We are a well-established semiconductor company focused on manufacturing SSD chips for globally recognized semiconductor companies. We are looking to further build our engineering team at our offices in San Jose CA. · Extensive experience working with SSD and PCIe along with IP i ...

This is a RTL Design Engineer position requiring participation in technical roles throughout product development cycles. · FPGA Experience in design, simulation, synthesis, implementation · ...

Participate in technical role in all phases of the product development cycle including architecture design documentation for Ips. · Design verify and validate high-performance logic using System Verilog/Verilog. · Perform pre-silicon verification emulation to ensure functional co ...