Senior Technical Staff Engineer - San Jose

Only for registered members San Jose, United States

1 week ago

Default job background
$88,000 - $232,000 (USD)
+Job Summary
The DFT lead works in close partnership with different teams within the FPGA business unit spanning architecture, design, verification, physical implementation,
and test engineering to implement the testability features into the combined FPGA and ASIC SOC.

+Responsibilities

  • Manage DFT requirements across architecture, design,
    and product teams to ensure coverage,
    die cost,

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