Senior ASIC Verification Engineer - Roseville, United States - Western Digital

Senior ASIC Verification Engineer

3 weeks ago

Company Description · At Western Digital, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible. · At our core, Western Digital is a company of problem solvers. People achieve extraordinary things g ...

Senior ASIC Verification Engineer

4 days ago

Job Description · Job Description Company Description · At Western Digital, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible. · At our core, Western Digital is a company of problem solvers. Peo ...

Sr Technical Staff Engineer- Verification

5 days ago

Microchip Tech Sr Technical Staff Engineer- Verification (TSEV-GKM) in Roseville, CA. Verify complex digital integrated circuits at the block, subsystem or system level (100M+ gates). Telecommuting permitted within the area of intended employment. Reqs BS fllwd by 5 yrs progressi ...

Design Verification engineer

5 days ago

Role :: Design Verification engineer · Location :: Folsom, CA · Type :: Contract · • Utilize hands-on experience in SystemVerilog, UVM, and Testbench development to facilitate the verification process. · • Perform thorough debugging and troubleshooting to identify and resolve iss ...

Design Verification Engineer

5 days ago

Title: Design Verification engineer · Location: Folsom CA · Full time (Onsite) · Key Responsibilities: · Utilize hands-on experience in System Verilog, UVM, and Testbench development to facilitate the verification process. · Perform thorough debugging and troubleshooting to ident ...

Design Verification engineer

2 days ago

Role :: Design Verification engineer · Location :: Folsom, CA · Type :: Contract · • Utilize hands-on experience in SystemVerilog, UVM, and Testbench development to facilitate the verification process. · • Perform thorough debugging and troubleshooting to identify and resolve iss ...

Design Verification engineer

2 days ago

Title: Design Verification engineer min 10 yeras · Location: Folsom CA · Type: Fulltime · onsite to work or relocate · Key Responsibilities: · Utilize hands-on experience in SystemVerilog, UVM, and Testbench development to facilitate the verification process. · Perform thorough d ...

Design Verification engineer

1 week ago

Title: Design Verification engineer min 10 yeras · Location: Folsom CA · Type: Fulltime · onsite to work or relocate · Key Responsibilities:Utilize hands-on experience in SystemVerilog, UVM, and Testbench development to facilitate the verification process. · Perform thorough ...

Design Verification Engineer

5 days ago

Design Verification Engineer · Work Location – Folsom, CA USA (1st Day onsite) · (8-15 · Years Experience) · Key Responsibilities: · Utilize hands-on experience in System Verilog, UVM, and Testbench development to facilitate the verification process. · Perform thorough debuggi ...

Design Verification Engineer

5 days ago

About Us: · At Tech Mahindra (Tech Mahindra | Connected World, Connected Experiences), we live the philosophy of connected world and connected experiences. We thrive on change that is powered by the intelligent symphony of technology and humans designing meaningful and sustainabl ...

Design Verification Engineer

3 weeks ago

Job Details: · Job Description: · Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs. With the first Open System Foundry model in the world, our combined offerings of wafer fabrication, advanced proces ...

Design Verification Engineer

1 week ago

Design Verification Engineer · Work Location – Folsom, CA USA (1st Day onsite) · (8-15 Years Experience) · Key Responsibilities: · Utilize hands-on experience in System Verilog, UVM, and Testbench development to facilitate the verification process. · Perform thorough debugg ...

Design Verification Engineer

4 days ago

About Us: · At Tech Mahindra (Tech Mahindra | Connected World, Connected Experiences), we live the philosophy of connected world and connected experiences. We thrive on change that is powered by the intelligent symphony of technology and humans designing meaningful and sustainab ...

Design Verification Engineer

5 days ago

Utilize hands-on experience in SystemVerilog, UVM, and Testbench development to facilitate the verification process. · Perform thorough debugging and troubleshooting to identify and resolve issues efficiently. · Conduct full-chip and SoC simulations to validate design functionali ...

Design Verification Engineer

8 hours ago

Utilize hands-on experience in SystemVerilog, UVM, and Testbench development to facilitate the verification process. · Perform thorough debugging and troubleshooting to identify and resolve issues efficiently. · Conduct full-chip and SoC simulations to validate design functionali ...

Verification Engineer System Verilog

6 days ago

Are you passionate about creating cutting-edge digital designs and ensuring their flawless functionality? We are seeking a skilled SystemVerilog Verification Engineer to join our dynamic team. In this role, you will leverage your expertise in SystemVerilog, UVM, and Testbench dev ...

Verification Engineer System Verilog

2 days ago

Are you passionate about creating cutting-edge digital designs and ensuring their flawless functionality? We are seeking a skilled SystemVerilog Verification Engineer to join our dynamic team. In this role, you will leverage your expertise in SystemVerilog, UVM, and Testbench dev ...

Design Verification engineer- FullTime

5 days ago

Job Description · Job Description · Title: Design Verification engineer · Type: FullTime · Location: Folsom, CA- Onsite · Key Responsibilities: · Utilize hands-on experience in SystemVerilog, UVM, and Testbench development to facilitate the verification process. · Perform thor ...

Design Verification engineer- FullTime

1 week ago

Job Description · Job DescriptionTitle: Design Verification engineer · Type: FullTime · Location: Folsom, CA- Onsite · Key Responsibilities: · Utilize hands-on experience in SystemVerilog, UVM, and Testbench development to facilitate the verification process. · Perform thorough ...

Design Verification Engineer

1 week ago

Job Description · Job DescriptionDesign Verification Engineer · Work Location – Folsom, CA USA (1st Day onsite) · (8-15 Years Experience) · Key Responsibilities: · Utilize hands-on experience in System Verilog, UVM, and Testbench development to facilitate the verification proces ...