Specialist, FPGA Design Engineer - Salt Lake City, United States - Harris Geospatial Solutions

Description

Job Title:
Specialist, FPGA Design Engineer

Job Location:
Salt Lake City, UT

Job Code: 10805

Work Schedule: 9x80


Job Description:

We are looking for a talented FPGA (Field Programmable Gate Array) design engineer with industry experience in signal processing techniques.

We design, develop, and test communication systems, advanced electronic warfare systems and multi-function systems.

L3Harris development efforts include the whole lifecycle of designs from proposals, requirement definition, coding, simulation, synthesis, place and route, verification testing, and system support.

This position would focus on the coding, simulation, synthesis, place and route, and verification testing aspects.

We are looking for an engineer who enjoys challenging work with a team of talented engineers and can work well both with a team and as an individual contributor.

Salt Lake City provides incredible year-round outdoor recreation options and cultural experiences, and L3Harris values your work/life balance so you can enjoy these opportunities.

Areas of expected technical experience or education include:

Experience in simulation, synthesis, and placement software tools such as ModelSim, Synplicity, Xilinx Vivado / ISE and/or Altera Quartus development tool sets.

Experience in laboratory debug techniques using signal generators, digital oscilloscopes, logic analyzers, BERTS, and other complex measurement devices.
Experience with timing closure in FPGAs

Basic Qualifications:
Bachelor's Degree and minimum 4 years of prior relevant experience. Graduate Degree and a minimum of 2 years of prior related experience. In lieu of a degree, minimum of 8 years of prior related software engineering experience.

Preferred Additional Skills:
Bachelor's (Master's preferred) degree in Computer Science, Computer Engineering, Software Engineering or Electrical Engineering.
4+ years FPGA design experience on Digital Signal Processing designs.
Experience in either VHDL (preferred) or Verilog hardware development languages.
Experience implementing complex Digital Signal Processing (DSP) algorithms in FPGA devices. Equivalent experience in ASIC devices is also applicable.
Experience implementing industry standard interfaces (e.g. 10/100/1000 Ethernet, SPI, UART, SDRAM, DDR3, JESD, PCIe, Ethernet).
FPGA Design using High-speed serial interfaces (3+ Gbps)
Familiarity with code revision management tools such as Git/Clearcase.
Familiarity with C/C++/C# and Matlab/Simulink.

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