RTL Engineer - Hillsboro

Job description: · Job Description · Required Skills and Qualifications: · • Education: Bachelor's or master's degree in electrical engineering, Computer Science, or a related field. · Experience: · • Proven experience in RTL design and integration (using Verilog, VHDL, or Syst ...

The hire will be involved in deep sub-micron IC logic and VLSI design, validation, development developing verifying and validating competitive solutions with ***'s PROM circuit technology for use in mobile IOT client network and server segments. · Provides PostSi support includin ...

· Company Description · About Collabera · Collabera is the largest minority-owned Information Technology (IT) staffing firm in the U.S., with more than $525 million in sales revenue and a global presence that represents approximately 10,000 professionals across North America (U. ...

NVIDIA has been transforming computer graphics PC gaming and accelerated computing for more than 25 years An era in which our GPU acts as the brains of computers robots and self-driving cars that can understand the world , · We are now looking for a motivated ASIC RTL integration ...

We are now looking for a CPU Design Methodology Engineer · The NVIDIA CPU team is looking for a top ASIC Engineer with an interest in SOC design automation, · Rtl integration, · and chip build and assembly.You should be passionate about developing methodologies and automation sol ...

This work will be mainly in the synthesis and auto place and route (APR) areas. · Take all of the required input files and scripts needed to run through the synthesis (RTL to netlist) and APR flows from floorplan to converged layout. · This may also include work that will come fr ...

We are looking for Senior DFT Design Engineer to join our team who are ready to make significant impacts in graphics and visual computing. · ...

Are you passionate about computer graphics and disrupting the industry with your innovation and working with leading Engineers on Intel's latest GPU/CPU architecture? · You will design RTL/GLS validation automation timing analysis for Scan/ATPG JTAG controller develop logic desig ...

+Job Summary: · We're looking for Senior DFT Design Engineers to join our AI SOC Engineering team. You will work on design automation tools like ATPG tools, Siemens Tessent shell VCS simulation/debugging EDA tools. · +You will work on the design RTL GLS validation automation timi ...

We are seeking experienced RTL design engineer contractors to implement IP for digital blocks, · Minimum experience with proficiency in defining block level specifications and performing RTL coding for SOC blocks, · Working with the Physical Design team to optimize physical const ...

We are looking for a Senior CPU Design Engineer to design the world's leading CPUs. · ...

We are seeking experienced Lead RTL design engineer to lead and reduce ramp up time, · familiar with the environment, · provide guidance and support to 2 contractors to implement IP for digital blocks, · ...

Rambus seeks an exceptional Senior/Principal Design Verification Engineer to join their Memory Controller IP team in Hillsboro,Oregon. · ...

Job Details: · Job Description:  · Do Something Wonderful · Intel put Silicon in Silicon Valley. No one else is obsessed with engineering and has a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a ...

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of ...

+Job summary · Rambus is seeking an exceptional Senior/Principal Design Verification Engineer to join their Memory Controller IP team in Hillsboro, Oregon. · +Responsibilities · + Testbench and test sequence development for verification of new controller technologies and features ...

Rambus is seeking to hire an exceptional Senior/Principal Design Verification Engineer to join our Memory Controller IP team in Hillsboro, Oregon. · ...

Rambus is seeking an exceptional Senior/Principal Design Verification Engineer to join our Memory Controller IP team in Hillsboro, Oregon. · ...

Rambus seeks to hire an exceptional Senior/Principal Design Verification Engineer to join their Memory Controller IP team in Hillsboro. The successful candidate will participate in pre-silicon RTL verification activities related to Memory Controller SoftIP development. · ...

+Job summary · Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is responsible for powering Microsoft's ...