SoC Debug Engineer - Folsom, United States - Workday

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    Description

    Job Details:

    Job Description:
    Do Something Wonderful
    Intel put the Silicon in Silicon Valley. No one else is this obsessed with engineering a brighter future. Every day, we create world changing technology that enriches the lives of every person on earth. So, if you have a big idea, let's do something wonderful together. Join us, because at Intel, we are building a better tomorrow. Want to learn more? Visit our

    YouTube Channel

    or the links below
    Life at Intel
    Diversity at Intel

    Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations.

    With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life.

    Join us and help make the future more wonderful for everyone.

    Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs.

    With the first "Open System Foundry" model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient, and sustainable source of supply.


    An SoC debug engineer is responsible for developing, enabling, and validating DFD (Design for Debug) features and tools that are used for debugging SoC designs in a post-silicon environment, as well as driving effective root cause identification and resolution of issues discovered during silicon validation.


    Responsibilities will include but not limited to:
    Designing, developing, and implementing software tools to enable the usage of debug features in a post-silicon environment.
    Developing test plans for DFD features.

    Testing DFD features and associated debug tools in a pre-silicon emulation environment to ensure all features, tools and flows work according to specifications.

    Contributing to the DFD (Design for Debug) architecture through review of specifications.

    Bringing up and enabling debug tools and DFD features in a post-silicon environment and supporting teams that use the tools.

    Debugging and root causing silicon issues using knowledge of tools, specs, and customer requirements.
    Providing guidance on issue resolution and leading debug taskforces to drive resolution of issues when needed.
    Influencing the IP/SoC design decisions and validation methods by doing validation gap and bug escape analysis.

    Candidate should have the following attributes:
    Excellent problem-solving and interpersonal skills, as well as good written and verbal communication skills.
    Willingness to work cross-geo/site when needed to accomplish results.


    Qualifications:
    What we need to see

    (Minimum Qualifications):


    Bachelor's degree in electrical/computer engineering, or equivalent degree with 3+ years of experience listed below, OR Master of Science degree in Electrical/Computer Engineering, or equivalent degree with 2+ years of experience listed below.

    2+ years' experience with digital electronics, logic design, and design for debug concepts and CPU Architecture.

    2+ years' experience subsystem HW/SW stack, including the silicon, onboard HW components and connectors and debug interfaces such as JTAG, I2C, and UART.

    2+ years' experience developing post-silicon test/debug tools using C/C++ and/or Python.

    2+ years' experience with hands-on debug in post-silicon environment using debug tools such as using ITP/JTAG, Logic Analyzers and Oscilloscopes.

    How to Stand out

    (Preferred Qualifications):

    Post graduate degree Electrical Engineering, Computer Engineering, Computer Science, or in a related field of study.
    2+ years' experience ARM, RISC-V and x86 ISA.
    2+ years' experience with pre-silicon validation using FPGAs and/or In-Circuit Emulators.
    1+ years' experience with Intel products or other CPU/SoC products in a post-silicon engineering environment.
    1+ years' experience developing debug methods and debug tools for SoC validation.

    1+ years' experience subsystem HW/SW stack, including the silicon, onboard HW components and connectors and devices, BIOS, drivers, and applications.

    Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research.

    Amazing Benefits
    Here at Intel, we invest in our people.

    Beyond health, dental, and retirement benefits, Intel's benefits package includes 14 paid holidays per calendar year, three weeks of paid vacation, and four-week paid sabbatical every four years of employment.


    Intel also offers employees five bonuses per year dependent on overall company and personal performance, and an employee stock purchase program.

    Find more information about our

    Amazing Benefits here :


    #IFSJobs


    Job Type:
    Experienced Hire


    Shift:
    Shift 1 (United States of America)


    Primary Location:
    US, California, Folsom

    Additional Locations:
    US, Arizona, Phoenix, US, California, Santa Clara, US, Oregon, Hillsboro

    Business group:

    Intel Foundry Services (IFS) is an independent foundry business that is established to meet our customers' unique product needs.

    With the first "Open System Foundry" model in the world, our combined offerings of wafer fabrication, advanced process, and packaging technology, chiplet, software, robust ecosystem, and assembly and test capabilities help our customers build their innovative silicon designs and deliver full end-to-end customizable products from Intel's secure, resilient and sustainable source of supply.


    Posting Statement:

    All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

    Position of Trust N/A

    Benefits:
    We

    offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.

    Find more information about all of our Amazing Benefits here:

    Annual Salary Range for jobs which could be performed in

    US, California:
    $119,130.00-$178,690.00

    S

    al

    ary

    range

    dependent on a number of factors including location and experience.

    Work Model for this Role

    This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

    In certain circumstances the work model may change to accommodate business needs.
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