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Silicon Validation Engineer - Redmond, United States - META
Description
Summary:
The Reality Labs team is building products that make it easier for people to connect with the ones they love most.
We are a team of world-class experts developing and shipping products at the intersection of silicon, hardware, software, and content.
The Reality Labs team seeks a Silicon Validation Engineer.As a Silicon Validation Engineer, you will be part of the RL Silicon Validation team validating high performance silicon and leading the effort to ensure high-quality silicon delivery.
Required Skills:
Silicon Validation Engineer Responsibilities:
Responsible for SoC and E2E system validation plan development, execution and sign-off.
Identify and communicate technical risks related to the project to the stakeholders.
Plan, organize, and oversee silicon bring-up and validation activities across multiple SoCs.
Understands system HW/SW/FW component as a whole and drives test execution and debug with cross functional/PnP teams.
Lead lab debug, silicon bug repro, failure analysis, and failure report activities.
Work with cross-functional teams (i.e., architecture, IP, FW, EE, SoC, and product engineer teams) to generate validation reports for SoC and systems.
Minimum Qualifications:
Minimum Qualifications:
7+ years of hands-on experience in bring-up and validation of complex SoCs.
Problem solving, debug, and whiteboard skills.
Experience influencing design, DV and Post-Silicon validation teams to optimize the usage of Pre-Silicon Prototype platforms.
5+ years of experience in leading silicon validation planning, execution, validation FW development, and validation signoff.
Background in high-speed protocols (i.e., MIPI, PCIe, USB, DDR) and hands-on experience in high-speed IO bring-up.
Experience in building silicon validation infrastructure and test automation.
Hands-on experience in using lab equipment, such as scopes, BERTs, protocol analyzers, JTAG debuggers, etc.
Experience working in a cross functional and cross site team environment.
Preferred Qualifications:
Preferred Qualifications:
Knowledge of ASIC design flow, silicon foundry test flow, and silicon FW development process.
Knowledge and experience in pre-silicon validation platforms (i.e., FPGA and emulation).
Public Compensation:
$173,000/year to $249,000/year + bonus + equity + benefits
Industry:
Internet
Equal Opportunity:
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer.
We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics.
We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-
