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    Senior Firmware Engineer - Las Cruces, United States - ArgonFDS

    ArgonFDS
    ArgonFDS Las Cruces, United States

    4 weeks ago

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    Description

    Job Description

    Job Description

    Please note this posting is for our sister company CALCULEX.

    CALCULEX is a leader in developing high tech solutions for the acquisition, recording, and processing of data often supporting developmental and operational test of military and commercial airborne systems. CALCULEX is comprised of a small team of highly trained, skilled and motivated Electrical and Mechanical Engineers, FPGA Code Designers, Firmware and Software Programmers, and Technicians.

    Education: Bachelor's Degree in Electrical Engineering or Equivalent

    Experience Required

    • 5 years experience designing with System on Chip
    • 5 years experience with FPGAs; Intel: Arria, Agilex, Stratix, Cyclone or Xilinx
    • Experience with both Vivado and Quartus Development Systems
    • 5 Years experience in timing closure on high percentage FPGA fabrication
    • Functional knowledge of an FPGA programming language, such as Verilog or VHDL
    • Functional knowledge of ModelSim FPGA simulation software
    • Functional knowledge of IEEE 1149 JTAG electronic circuit testing
    • System requirements analysis and architecture development – alternate approach evaluation
    • Part selection – FPGA and boot PROMs, DDRs & QDRs, clock buffers, I/O transceivers
    • IPT design reviews and design updates as required
    • Bank voltage selection/pinning during PCB placement, may change during routing
    • External memory pinout/SSN/package skew during placement, may change during routing
    • Transceiver pinout during placement, may change during routing
    • Dummy FPGA compiles – resource utilization and pinout confirmation for PCB routing
    • Power budgets – worst case and typical power utilization per voltage rail
    • Simulations at component level and top level
    • PCB board start-up – electronic circuit and PCB design initial power-up verifications
    • External memory IC interface margin testing
    • Eye diagram test utilities and transceiver emphasis and equalization adjustments
    • Logic testing/integration – requirement-traceable verification and upgrade regression testing

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