- Architect and build system and unit-level UVM verification environment
- Work with architects to define verification strategy and execution plans
- Review metrics and deliver tasks with high quality
- Analyze Functional, Code, and Test Plan Coverage
- Drive and participate in Code Reviews
- Identify, drive, and develop efficiency and IP quality improvement initiatives
- Drive root cause analysis and corrective actions for Functional bugs found in Silicon
- Drive projects from start to finish and conduct Design verification sign-off
- Masters degree in Electrical Engineering or related field
- 5 years of industrial experience in Design Verification
- Proficiency in SystemVerilog and Object-Oriented Programming
- Experience in UVM, SVA, VIP, DPI
- Understanding of verification best practices
- Experience in PCIe protocol stack
- Proficient scripting language in one of: Python, TCL, Shell, Perl
- Self-motivated team worker
- Overall design verification experience in the ASIC industry
- Design verification lead or management experience
- Strong background in development of verification environments in System Verilog
- Expertise in constrained random verification methodologies
- Formal verification experience
- Extensive experience verifying complex designs using UVM
- Experience in CXL, AXI, AHB, USB, I2C, Ethernet
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Verification Engineer
2 days ago
Achronix Semiconductor Santa ClaraAchronix Semiconductor Corporation is a leading provider of high-performance FPGA solutions. · We are seeking a skilled Verification Engineer to contribute to the verification and validation of FPGA cores and related ASIC subsystems implemented in modern FPGA technology nodes (7n ...
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Design Verification Engineer
9 hours ago
Sintegra Inc. San JoseJob Title: Design Verification Engineer · We are seeking an experienced Design Verification Engineer to join our team. · **Position Summary:** · Develop and execute verification plans for complex digital designs, focusing on PCIe and DDR protocols. The ideal candidate will have a ...
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Design Verification Engineer
11 hours ago
Broadcom Inc. San JoseDesign Verification Engineer · The ASIC Product Division in Broadcom is looking for qualified individuals to work in SoC and IP development programs. · This role involves advanced verification tasks, including: · Verification environment development using System Verilog and UVM · ...
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Design Verification Engineer
15 hours ago
Xlysi San JoseDesign Verification Engineer · A highly experienced Design Verification Engineer with over 10 years of expertise is sought after to join our team in San Jose. · About the Role: · Develop and execute test plans to ensure the highest quality design. · Create and maintain verificati ...
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Design Verification Engineer
1 day ago
ALTEN San Jose, CADesign Verification Engineer (University Grad) · Job Description · We are seeking a highly skilled Design Verification Engineer to join our team at {company}. The ideal candidate will have strong hands-on experience in design verification, static verification, and UVM. · Experien ...
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Design Verification Engineer
9 hours ago
Acceler8 Talent San JoseAccer8 Talent has partnered with a leading startup specializing in next-generation interconnect technologies designed for HPC and AI applications. The company has secured a significant partnership with a global industry leader.The startup is looking for a Principal ASIC Design Ve ...
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SMTS Verification Engineering
3 days ago
Jobleads-US San JoseJob Description · We are seeking a talented Principal Verification Engineer to join our Memory Interface Chip team. · About the Role · Develop verification methodologies for high-performance DDR5 family of products. · Create a verification environment for Power Management IC (PMI ...
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Design Verification Engineer
9 hours ago
Cisco San JoseJob Summary · This role involves working with front-end RTL Design and Verification teams and Architects to understand chip architecture and drive design verification requirements. You'll work with SDK and Software teams as part of ASIC development to build a flawless handshake b ...
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Physical Verification Engineer
9 hours ago
ASICSoft San JoseJob Title: Physical Verification Engineer · San Jose, CA (Onsite) · 8-12+ years of experience · $150K - $220K Base Compensation · About the Role: · The company is seeking a skilled Physical Verification Engineer in San Jose. The ideal candidate will have hands-on expertise in Cal ...
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Physical Verification Engineer
9 hours ago
Triple Crown San JoseJob Description: · We are looking for a highly skilled and detail-oriented Physical Verification Engineer to join a design team in the semiconductor industry. · Perform physical verification tasks, including DRC (Design Rule Check), LVS (Layout vs. Schematic), and ERC (Electrical ...
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Design Verification Engineer
14 hours ago
ACL Digital San JoseDevelop verification methodologies and testbenches for digital and mixed-signal blocks. Test plans cover parallel link and SerDes IP blocks and on-chip interconnects. Requirements include: · • BS or MS in Electrical Engineering, Computer Engineering, or related fields. · • Experi ...
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Design Verification Engineer
20 hours ago
ALTEN San Jose, CAASIC Verification Engineer (Block and IP level verification) · Create verification environments, perform pre-silicon functional verification at the block, chip, and system levels, develop reference models, and conduct post-silicon validation. · Key Responsibilities: · Design and ...
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Design Verification Engineer
12 hours ago
Ursus Inc San JoseDesign Verification Engineer: A 1-year role in San Jose, CA, focusing on GPU subsystem verification. Proficient in System Verilog/UVM/OVM, C++, and GPU architecture. Key responsibilities include triage, debug, and regression management, and verification testbench development. Req ...
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Design Verification Engineer
15 hours ago
Bayone San JoseJob Description Summary: GPU Design Verification Engineer role involves ensuring quality at the heart of GPU architecture, requiring creativity and up-to-date verification techniques. · As a GPU Design Verification Engineer, your talents will ensure the quality at the heart of ou ...
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Design Verification Engineer
9 hours ago
ALTEN San JoseDesign Verification Engineer (University Grad) · This role is ideal for a mid-senior level engineer who has strong hands-on experience with Design Verification, Static Verification, and UVM. · Main Responsibilities: · Expertise in Design Verification, Static Verification, and UVM ...
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Design Verification Engineer
1 day ago
Cisco San Jose, CAJob Description · Cisco's Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. · We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, an ...
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ASIC Verification Engineer
1 day ago
Yoh San JoseASIC Verification Engineer · We are seeking a highly skilled ASIC Verification Engineer to review product designs, identify potential failure points, and design verification methodologies. · Review product designs and note likely points of failure. · Design verification methodolo ...
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Design Verification Engineer
9 hours ago
ALTEN San JoseJob Description: · As an ASIC Verification Engineer, you will be responsible for creating verification environments and performing pre-silicon functional verification at the block, chip, and system level. You will also develop reference models and conduct post-silicon validation. ...
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Design Verification Engineer
11 hours ago
Broadcom Corporation San JoseJob Description: · The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs. · The candidate will be joining a high-performance design team responsible for st ...
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Principal Verification Engineer
1 day ago
Rambus San JoseJoin our team to develop products that make data faster and safer. · Rambus, a premier chip and silicon IP provider, is seeking a Principal Verification Engineer to join our Memory Interconnect Design team in San Jose, California. The candidate will report to the Director of Desi ...
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Design Verification Engineer
13 hours ago
Bayone San JoseWe are seeking a Design Verification Engineer to contribute to the functional verification of GPU Subsystems in our Austin office. · Job Summary · This is a hybrid 3 to 4 day per week position, open to 1099 or C2C candidates. The ideal candidate will be local to the San Jose mark ...
Lead Design Verification Engineer - San Jose - SQL Pager LLC

Description
Job Summary
A full-time, direct-hire role at a leading semiconductor company seeks an experienced Design Verification Engineer to lead verification efforts on PCIe IPs and SoC products.
Key Responsibilities
Qualifications
To be successful in this role, candidates should possess:
PREFERRED QUALIFICATIONS
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Verification Engineer
Achronix Semiconductor- Santa Clara
-
Design Verification Engineer
Sintegra Inc.- San Jose
-
Design Verification Engineer
Broadcom Inc.- San Jose
-
Design Verification Engineer
Xlysi- San Jose
-
Design Verification Engineer
ALTEN- San Jose, CA
-
Design Verification Engineer
Acceler8 Talent- San Jose
-
SMTS Verification Engineering
Jobleads-US- San Jose
-
Design Verification Engineer
Cisco- San Jose
-
Physical Verification Engineer
ASICSoft- San Jose
-
Physical Verification Engineer
Triple Crown- San Jose
-
Design Verification Engineer
ACL Digital- San Jose
-
Design Verification Engineer
ALTEN- San Jose, CA
-
Design Verification Engineer
Ursus Inc- San Jose
-
Design Verification Engineer
Bayone- San Jose
-
Design Verification Engineer
ALTEN- San Jose
-
Design Verification Engineer
Cisco- San Jose, CA
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ASIC Verification Engineer
Yoh- San Jose
-
Design Verification Engineer
ALTEN- San Jose
-
Design Verification Engineer
Broadcom Corporation- San Jose
-
Principal Verification Engineer
Rambus- San Jose
-
Design Verification Engineer
Bayone- San Jose