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    • Principal Engineer, NPU architect - San Jose - Samsung Semiconductor

    Samsung Semiconductor
    Samsung Semiconductor San Jose

    4 weeks ago

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    Description

    Job Summary

    We are seeking a dynamic and self-motivated Sr. Staff Engineer to join our Advanced Controller Development (ACD) team, part of Samsung's Memory Business Unit.

    The ACD team is responsible for developing new technology for storage (SSD) controllers to solve key problems of Cloud & Data center. We work closely with development teams to bring feature innovation to product roadmaps.

    In this role, you will focus on enhancing memory and storage capability by developing prototype controllers and optimizing them for mass production. You will drive architectural definition of NPUs (Neural Processing Unit) for data center AI applications and develop new architectures for low power, high performance.

    Key Responsibilities:

    • Develop new architectures for low power, high performance
    • Lead PPA tradeoff analysis to achieve requirements
    • Work closely with compiler and software architects to come up with optimized architectural solutions
    • Participate in the development of NPUs
    • Work closely with design verification team for debug, to meet code and functional coverage targets

    Requirements:

    • Bachelors in Electrical, Computer Science or related with 20+ years of experience or Masters in Electrical, Computer Science or related Science with 18+ years of Industry Experience or PhD in Electrical, Computer Science or related Science with 15+ years of working experiences in NPU architecture & development
    • Good knowledge and experience in architecture/design of NPUs
    • Good knowledge in CNN, Transformer Network
    • Well versed in processor architecture like ARM and RISC-V
    • Experience in ML frameworks (TensorFlow, PyTorch, ONNX)
    • Good knowledge in ML compilers
    • Experience in micro architecture of SoC, interface sub systems, logic modules
    • Experience in complex logic designs and timing closure on the large sophisticated designs

    Preferred Skills:

    • Experience in HBM and interconnect IPs like CMN-700 and Ncore
    • Experience in modeling for performance/power estimates using SystemC/C++/Python
    • Good knowledge in ASIC design flow
    • Highly motivated with good verbal and written communication skills
    • Creativity in problem solving

    About Samsung Semiconductor

    Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status.

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