RTL Intern - San Jose

As an RTL Intern at Etched, you will help design microarchitecture and implement logic in verilog. · You will work with cutting-edge machine learning architectures, contribute to RTL block development, and participate in the full design cycle—from microarchitecture discussions to ...

About Etched · Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like ...

About Etched · Etc... · Progress towards a Bachelor's · Familiarity with high-speed digital logic · ...

We are looking for interns across RTL Design, Design Verification, or Physical Design to join our team. · ...

We are looking for interns across RTL Design, Design Verification, or Physical Design to join our team. As an RTL Intern at Etched, you will help design microarchitecture and implement logic in verilog. · Progress towards a Bachelor's, Master's, or PhD degree in electrical engine ...

FPGA/RTL Design Engineer to design, implement, and validate digital circuits and FPGA-based solutions. · ...

Lead RTL design efforts for TetraMem ASIC/SoC products. · ...

This role involves hands-on development using RTL languages and FPGA design tools while also supporting customers and creating technical assets that enable successful adoption of our products. · ...

The job is responsible for leading · RTL design efforts and collaborating with the backend team. The role requires experience in Verilog and system Verilog, · VCS, Verdi or other industry standard tools.Familiarity with AMBA APB AXI Protocol · RISC/Arm or other core architecture ...

· Core Responsibilities: · As a DDR Applications Engineer you will be involved with customer interfacing on all phases of phy and controller design of high performance ddr interface from RFQ, RTL to delivery of our final GDSII. Your responsibilities include but are not limited t ...

+We are seeking a Digital Hardware Intern to support the design, verification, and integration of digital systems in TetraMem's AI accelerators. · +Support RTL design using Verilog or SystemVerilog ...

We are seeking a Digital Hardware Intern to support the design, verification, and integration of digital systems in TetraMem's AI accelerators. · You'll contribute to RTL design, simulations, and performance optimization for real-world AI computing applications. · Support RTL des ...

About the Role · We are seeking a high-caliber Engineer to lead the architectural design and development of a next-generation Top-level Integration Flow. · Your mission is to build a highly automated framework—comparable to SoC Compiler—that streamlines the path from IP handoff t ...

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. · Design Engineering Intern · The Cadence Silicon Solutions Group (SSG) is seeing rapid adoption of our industry leading Digital IP (intellectual Property), from processo ...

Broadcom is looking for a high-speed DSP SerDes RTL designer with MS or PhD in Electrical Engineering or Computer Engineering and experience in high speed ADC based SerDes RTL design. · Qualifications: · MS or PhD in Electrical Engineering or Computer Engineering with 6+ years of ...

Broadcom is looking for a high-speed DSP SerDes RTL designer. · MS or PhD in Electrical Engineering or Computer Engineering with 6+ years of experience in high speed ADC based SerDes RTL design. · ...

Broadcom is looking for a high-speed DSP SerDes RTL designer · ...

A global leader in the fabless semiconductor space powers billions of devices annually—ranging from mobile phones and smart home systems to automotive platforms and edge AI. · ...

We are looking for an early‑career engineer to support AMS (Analog‑Mixed‑Signal) + Digital Integration activities for next‑generation semiconductor designs. · This Position Provides Hands‑on Exposure To · Mixed‑signal IP integration · Basic RTL coding and digital build flows · AM ...

We are looking for an early‑career engineer to support AMS (Analog‑Mixed‑Signal) + Digital Integration activities for next‑generation semiconductor designs. · This Position Provides Hands‑on Exposure To · Mixed-signal IP integration · Basic RTL coding and digital build flows · AM ...