Engineer, ASIC Design - San Jose, CA

+We are committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, sexual orientation, · national origin, · genetic information, · age, · disability, · veteran status, · To ...

+Credo is engineering the future of high-speed connectivity for the AI-driven world. With a deeply rooted legacy of innovation and a passion for solving the complex networking challenges, we deliver industry-leading solutions that power the next generation of cloud, AI, and hyper ...

Credo is engineering the future of high-speed connectivity for the AI-driven world. This strategy not only differentiates us in the market but also creates significant value for our customers by accelerating deployment, improving performance, and reducing complexity across their ...

As a Director, ASIC Design you will lead the development of advanced ASIC solutions for next-generation data communication products. · You will provide technical leadership, collaborate across functions, and deliver high-quality silicon that meets stringent performance and reliab ...

+ Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models. ...

Cornelis Networks is hiring talented ASIC Design Engineers with deep experience in one or more of the key areas required to build the world-class SoCs to be deployed in high performance computing, high performance data analytics, and artificial intelligence interconnect solutions ...

+Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure ...

Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. · ...

The ASIC Design Engineer will be responsible for the design and implementation of micro-architectures and algorithmic computation engines. · IP and/or chip level micro-architectures, implementation, and validation · ...

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. · ...

Cisco's silicon team offers a unique experience for ASIC engineers combining resources stability of large multi geography organization with agility growth opportunities of smaller startup style team. · You'll collaborate with exceptional talent deep ASIC design development expert ...

A world leader in smart mobile technologies, · Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. · Bachelor's degree in electrical ...

We are building the world's fastest highly parallel mobile processing systems. In this role, you will work on crafting special purpose cache and controller which is part and parcel of the SOC memory hierarchy. · ...

We are looking for an ASIC Design Engineer to craft special purpose cache and controller which is part of the SOC memory hierarchy. The role involves designing hardware for cache subsystem in high performance system on a chip (SoC). · ...

Apple is building the world's fastest highly parallel mobile processing systems. · ...

We are developing extraordinary technology products that will solve customer problems for the next decade or more. · At , new ideas have a way of becoming excellent product and customer experiences very quickly. is leading the charge in architecture and design of state of the ar ...

As the ASIC Design Lead you will be responsible for leading the architecture design and implementation of our AI inference chips. · ...

We are hiring a Senior ASIC / RTL Design Engineer for an onsite role in San Jose.The ideal candidate will have strong hands-on experience in ASIC RTL design, · close collaboration with architecture, verification, and physical design teams, · and a proven ability to deliver high-q ...

We are searching for a dedicated engineer to join our exciting team of problem solvers.As a member of our complex group, you will get the outstanding and rewarding opportunity to craft upcoming products that will delight and encourage millions of Apple's customers every single da ...

This is a full-time on-site role for an ASIC Physical Design Engineer located in San Jose, CA. The engineer will be responsible for physical design of blocks and or toplevel. · Physical design of blocks and or toplevel, · ...