Engineer, ASIC Design - San Jose, CA

Credo is engineering the future of high-speed connectivity for the AI-driven world. With a deeply rooted legacy of innovation and a passion for solving the most complex networking challenges, we deliver industry-leading solutions that power the next generation of cloud, AI, and h ...

· Engineer, ASIC Design · Location:  San Jose (on-site) · Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we are using light instead of electricity to move data faster, further, and with a fraction of the ...

Senior ASIC Digital Design Engineer (Front-End) · Located on-site in San Jose, CA · Overview: · This is an exciting opportunity to work on high-speed digital integrated circuits for a startup who have a groundbreaking technology and have raised over $100million in funding. You wi ...

Job Title: ASIC Design Engineer · Job Description · As an ASIC Design Engineer, you will take ownership of the verification for the entire FPGA verification used in high-end router products. You will work closely with design engineers to understand design specifications and ident ...

Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. · ...

As a Director, ASIC Design you will lead the development of advanced ASIC solutions for next-generation data communication products. · You will provide technical leadership, collaborate across functions, and deliver high-quality silicon that meets stringent performance and reliab ...

Job Title: ASIC Design Engineer · Job Description · As an ASIC Design Engineer, you will take ownership of the verification for the entire FPGA verification used in high-end router products. You will work closely with design engineers to understand design specifications and ident ...

Lensa is a career site that helps job seekers find great jobs in the US. We are not a staffing firm or agency. Lensa does not hire directly for these jobs, but promotes jobs on LinkedIn on behalf of its direct clients, recruitment ad agencies, and marketing partners. Lensa partne ...

Lensa is a career site that helps job seekers find great jobs in the US. We are not a staffing firm or agency. Lensa does not hire directly for these jobs, but promotes jobs on LinkedIn on behalf of its direct clients, recruitment ad agencies, and marketing partners. Lensa partne ...

+Astera Labs provides rack-scale AI infrastructure through purpose-built connectivity solutions. The company's custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure ...

Responsibilities:IP and/or chip level micro-architectures, implementation, and validation · Develop algorithmic computation engines, NAND memory controller, and so on · Write up micro-architecture and design document and be able to present to customers · Develop RTL, perform synt ...

The application window is expected to close on: US 01/25/2026. This position will be onsite in San Jose 5 days per week. · Meet the Team · Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks. Cisco's silicon tea ...

The application window is expected to close on: US 01/25/2026. This position will be onsite in San Jose 5 days per week. · Meet the Team · Join the Cisco Silicon One team in developing a unified silicon architecture for web scale and service provider networks. Cisco's silicon tea ...

A world leader in smart mobile technologies, · Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. · Bachelor's degree in electrical ...

We are building the world's fastest highly parallel mobile processing systems. In this role, you will work on crafting special purpose cache and controller which is part and parcel of the SOC memory hierarchy. · ...

We are looking for an ASIC Design Engineer to craft special purpose cache and controller which is part of the SOC memory hierarchy. The role involves designing hardware for cache subsystem in high performance system on a chip (SoC). · ...

We are building the world's fastest highly parallel mobile processing systems. · Crafting special purpose cache and controller which is part and parcel of the SOC memory hierarchy. · ...

This is a full-time on-site role for an ASIC Physical Design Engineer located in San Jose, CA. The engineer will be responsible for physical design of blocks and or toplevel. · Physical design of blocks and or toplevel, · ...

We are building the world's fastest highly parallel mobile processing systems. Our high-bandwidth multi-client memory subsystems are blazing new territory with every generation. · ...

Imagine what you could do here. At Apple, new insights have a way of becoming extraordinary products, services, · and customer experiences very quickly.The same passion for innovation that goes into our products also applies to our practices strengthening · our dedication to leav ...