-
ASIC RTL/SoC Design Engineer
1 week ago
TetraMem INC Fremont, United StatesCompany Description · TetraMem is a fast-growing well-funded startup company working on the next generation of computing platforms with unique ReRAM-based in-memory computing technologies. We are hiring in multiple positions from software to hardware. · We offer a very competit ...
-
ASIC RTL/SoC Design Engineer
3 weeks ago
TetraMem INC Fremont, United StatesCompany Description · TetraMem is a fast-growing well-funded startup company working on the next generation of computing platforms with unique ReRAM-based in-memory computing technologies. We are hiring in multiple positions from software to hardware. · We offer a very competit ...
-
RTL ASIC Design Engineer
2 weeks ago
Innova Solutions Mountain View, United StatesInnova Solutions is immediately hiring an RTL ASIC Design Engineer Position type: Full Time Duration: Full Time Location: Mountain View, CA (Onsite) As an RTL ASIC Design Engineer, you will: Minimum Qualifications: RTL ASIC Design lead with some storage background Exp with Logic ...
-
ASIC FPGA RTL Design Engineer
3 weeks ago
Droisys San Jose, United StatesDroisys is an innovation technology company focused on helping companies accelerate their digital initiatives from strategy and planning through execution. We leverage deep technical expertise, Agile methodologies, and data-driven intelligence to modernize systems of engagement a ...
-
RTL ASIC Design Engineer
4 weeks ago
Wipro Sunnyvale, United StatesRTL ASIC Design Engineers with 8 to 15+ years of experience. · No of Openings: 2 · Sunnyvale, CA · Job Description: · 8+ years of Exp with Logic design /micro-architecture / RTL coding is a must. · Expertise in Verilog & System Verilog is a must. · Experience in Synthesis / ...
-
RTL ASIC Design Engineer
1 week ago
Innova Solutions Mountain View, United StatesInnova Solutions is immediately hiring an RTL ASIC Design Engineer Position type: Full Time Duration: Full Time Location: Mountain View, CA (Onsite) As an RTL ASIC Design Engineer, you will: Minimum Qualifications: RTL ASIC Design lead with some storage background Exp with Logic ...
-
RTL ASIC Design Engineer
3 weeks ago
Wipro Sunnyvale, United StatesRTL ASIC Design Engineers with 8 to 15+ years of experience. · Considering making an application for this job Check all the details in this job description, and then click on Apply. · No of Openings: 2 · Sunnyvale, CA · Job Description: · 8+ years of Exp with Logic design /m ...
-
RTL/ASIC Design Engineer
2 weeks ago
Netwoven San Jose, United StatesKEY RESPONSIBILITIES: · Microarchitecture development of IP subsystems · Perform RTL design of digital components. · Work with functional verification team to meet coverage and quality standards. · Analyze/fix Lint and CDC errors of the components. · Guarantee quality/timely deli ...
-
ASIC/RTL Design Engineer
4 weeks ago
ObjectWin Technology San Jose, United StatesASIC/RTL Design Engineer - Senior (US) · San Jose, CA days Onsite · 12 Months Contract · HM Notes: · This is general · SOC Design Engineer · role. · RTL Integration, coding exp · required. · Understanding · interface of IP blocks · required · Documentation exp · Veri ...
-
ASIC/RTL Design Engineer
4 weeks ago
Energy Jobline CVL San Jose, United StatesJOB DUTIES: The work will expose the designer to a number of IP including ARM cores, Ethernet, DDR, DMA, PCIE, SATA and · internal IPs. Successful candidates will be responsible for leading, and participating in, the design of leading edge SoCs in advanced digital CMOS processes ...
-
RTL ASIC design engineer
3 weeks ago
Wipro Sunnyvale, United StatesLogic design /micro-architecture / RTL coding is a must. · Expertise in Verilog & System Verilog is a must. · Experience in Synthesis / Understanding of timing concepts for ASIC is required. · Experience in design of DDR / USB /SATA/ PCIe controller or such complex protocols i ...
-
ASIC/RTL Design Engineer
4 weeks ago
Tekwissen San Jose, United StatesOverview: · TekWissen Group is a workforce management provider throughout the USA and many other countries in the world. This Client is an American multinational semiconductor company based in Santa Clara, California, that develops computer processors and related technologies fo ...
-
ASIC FPGA RTL Design Engineer
4 weeks ago
Droisys San Jose, United StatesDroisys is an innovation technology company focused on helping companies accelerate their digital initiatives from strategy and planning through execution. We leverage deep technical expertise, Agile methodologies, and data-driven intelligence to modernize systems of engagement a ...
-
ASIC Design/RTL
3 days ago
CHJ Recruiting San Jose, United StatesComputational requirements for next generation automotive camera processors are challenged by highly constrained use case environments (low power/small footprint) and competitive market dynamics. The ASIC Engineering team at our client's company architects, designs and verifies t ...
-
RTL Engineer
2 weeks ago
Wipro San Francisco, United States10+ years of experience in RTL/Verilog writing. · Qualifications, skills, and all relevant experience needed for this role can be found in the full description below. · Have expertise in static checking like CDC, Lint, RDC, Spyglass DFT along with module integration e · Logic ...
-
RTL Engineer
2 weeks ago
LanceSoft, Inc. San Jose, United Statesneed strong RTL engineer with solid expertise in CDC/RDC. its an immediate opportunity. · 1 expert in CDC/RDC (using Synopsys Spyglass tools) · Ability to debug CDC/RDC issues and have experience working with both front end and backend designers in resolving such issue · Typicall ...
-
RTL Design Engineer
4 days ago
Quest Global Mountain View, United StatesRTL Design Engineer · Mountain View CA · Required Qualifications · Bachelor's degree /master's degree · 9+ years RTL Design/Hardware Engineering experience or related work experience. Skills/Experience Required · Strong Domain Knowledge on RTL Design , implementation, and integr ...
-
MatX Mountain View, United StatesMatX is on a mission to be the compute platform for AGI. We are developing vertically integrated full-stack solutions from silicon to systems including hardware and software to train and run the largest ML workloads for AGI. MatX is seeking silicon micro-architects and design eng ...
-
RTL Design Engineer
4 weeks ago
Protingent Santa Clara, United StatesPosition Title: RTL Design Engineer · Position Description: Protingent Staffing has an exciting contract opportunity for RTL Design Engineer with our client located in San Jose, CA. · Project Description: Responsible for RTL design using Verilog HDL for implementation and debug. ...
-
RTL Design Engineer
1 week ago
Synapse Design Inc. San Jose, United StatesJob Description: · ASIC Design & RTL Skills · Architecture exploration and improvements · Micro-architecture development includes interface definition, state machine, data & control path definition, design partitioning. · RTL development using Verilog, System Verilog · Lint, CDC ...
Verification Engineer/ASIC RTL - Fremont, United States - TetraMem - Accelerate The World
Description
TetraMem is a fast-growing venture-backed well-funded startup company working on the next generation computing platforms with unique ReRAM-based in-memory computing technologies. We are hiring in multiple positions from software to hardware.
In this team you be part of a world-leading IC design team responsible for the development and deployment of hardware solutions for a revolutionary computing system, which we believe can bring up the energy efficiency by another two orders of magnitude, and completely changes the AI IoT industry. It is based on our unique computing memory device, which has SoTA bit-level per cell, nonvolatile, excellent retention, and endurance. We offer a very competitive compensation and benefits package (including medical, unlimited PTO, and 401k) that commensurate with experience.
Pay Range:
$110,000 - $250,000
ASIC RTL/SoC Design Engineer
Requirements:
● MS with 5+ years of experience or PhD in Electrical Engineering with emphasis on RTL/SoC/digital design
● Experience with Verilog and system Verilog
● Experience with VCS, and UVM design verification tools.
● Experience with pre-layout simulation and post-layout simulation
● Understanding of the design flow. Ability to work with the backend team
● Familiarity with AMBA APB AXI Protocol
● Familiarity with RISC/Arm or other core architectures
● Ability to create innovative architecture and solutions to customer requirements
● Ability to work in startup environment and work both independently and as a team player, with the ability to provide technical leadership to other members of the engineering team.
Experience in one or more of the following areas considered a strong plus:
● FPGA/ASIC design of image processing systems
● Working knowledge of SoC architecture such as CPU, GPU or accelerators
● Familiarity with: UVM, place-and-route, STA, EM/IR/Power
ASIC/SoC Design Verification Engineer
In this role, you will be part of a world-class IC design team responsible for defining and developing a revolutionary computing system, which we believe can reduce the energy consumption of AI processing by more than two orders of magnitude over conventional digital solutions. This will completely disrupt the AI IoT landscape. It is based on our unique computing memory technologies with multi-bit-level capacity per cell, which is nonvolatile with excellent retention and endurance.
We offer a very competitive compensation, commensurate with experience, and a full benefits package including medical, professional PTO, 401k, and other perks.
Responsibilities:
· Collaborate with design engineers and architects to define, document and implement detailed test plans for the SoC design verification.
· Build and maintain infrastructure/environment for automation verification of SoC architecture, function and performance.
· Develop reusable testbench, constrained-random/directed testcases, and verification associated behavioral module for both of block levels and system levels.
· Develop regression strategy, methodology and tools(scripts). Define and measure the function coverage. Close verification holes for design releases and tape-out.
· Work with design engineers to debug and identify root causes of simulation failure.
· Support test engineers for post-silicon validation.
· Mentor and coach team members and junior engineers. Drive verification efficiency.
Qualifications:
· MS with 8+ years of relevant experience or PhD (with 3+ years of experience) in Electrical Engineering, Computer Engineering, Computer Science or related degree.
· In depth knowledge of UVM/OVM, Semiformal Verification, assertion-based verification as well as hardware and software co-verification methodology.
· Extensive experience of building verification infrastructure, test planning, coverage closure, testbench and testcases development for function/performance verification.
· Proficient experience with Verilog, System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and industry mainstream ISAs assembly coding.
· Familiarity with MIPI, AMBA (APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core.
· Experience in verifying designs at both of RTL level and post-P&R gate level.
· Ability to work in a startup environment, and to work both independently and as a team player with the ability to provide technical leadership to other members of the engineering team.
Experience in one or more of the following areas considered a strong plus:
· Working knowledge of AI/ML Computing, GPU, ISP architectures and accelerators
· Experience in verifying mix-signal design and interface of digital and analog.
· Experience of design verification for highspeed IO such as PCIE and DDR.
