STA Engineer - Marlborough

The ASIC STA Engineer will be a member of a team working on next generation 100G-1T coherent optical communications products. · This role is a senior contributor focused on delivering highly complex ASICs in advanced technology nodes that are used in these next-generation telecom ...

+Job summary · Imagine what you could do here At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. · +Minimum BS and 10+ years of relevant industry experience. · Experience with large design STA and Timing Closure. · ...

Imagine what you could do here At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. · Work with design teams to understand and debug constraints and facilitate logic changes to improve timing. · Help create timing ECO ...

Imagine what you could do here At Apple new ideas have a way of becoming extraordinary products services and customer experiences very quickly Bring passion and dedication to your job and theres no telling what you could accomplish Dynamic hard-working people and inspiring innova ...

Imagine what you could do here At Apple new ideas have a way of becoming extraordinary products services and customer experiences very quickly. Bring passion and dedication to your job and theres no telling what you could accomplish. · Work with design teams to understand and deb ...

Our client is seeking an experienced Physical Design Engineer to drive timing closure for the PCIe subsystem within the Sparta SoC architecture. · ...

Job summary · Perform static timing analysis (STA) for the PCIe subsystem within the Sparta architecture. Responsibilities Perform static timing analysis (STA) for the PCIe subsystem within the Sparta architecture. · ...

Akkodis is seeking a Physical Design Engineer for a 6 Months contract position with a client located in Westborough MA. Perform static timing analysis STA for the PCIe subsystem within the Sparta architecture Develop validate and maintain PCIe-specific timing constraints SDC and ...

The position involves static timing analysis for PCIe subsystems within Sparta architecture. · ...

· A Physical Design Engineer with experience in static timing analysis for complex SoC designs is required. The candidate should have expertise with STA tools and a strong understanding of PCIe architecture, PHY interfaces, and timing requirements. · ...

Akkodis seeks a Senior Physical Design Engineer for contract located onsite in Westborough MA. · Required:Bachelor's or Master's degree in Electrical Engineering Computer Engineering VLSI or related semiconductor field. · Minimum 5+ years of hands-on experience in Static Timing A ...

A dedicated Physical Design Engineer is sought to join the dynamic team of a leading organization in the semiconductor and electronics industry. · Perform static timing analysis (STA) for the PCIe subsystem within the Sparta architecture. · Develop, validate, and maintain PCIe-sp ...

+ Lead timing closure for sub-system/partition or full-chip level designs+ Collaborate with RTL DFT and IP teams to drive iterative timing feedback and closure+ Deliver timing collateral and signoff reports per project milestones+ Perform timing correlation between PD tools and s ...

We are seeking a Principal Engineer with expertise in Design For Test (DFT) to join our Custom Silicon Engineering team. · QualificationsBachelor's degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience. · Direct DF ...

About Marvell · Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. · The successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and mar ...

This role involves leading an experienced team of physical design engineers at Marvell's Central Engineering organization. · The successful candidate will have technical direction experience and coaching skills to help team members achieve breakthroughs in their careers. · ...

The DCE team at Marvell is seeking a Principal Static Timing Analysis (STA) Engineer to contribute to a wide range of innovative projects. · This role involves close collaboration with Physical Design, Design for Test (DFT), and other cross-functional teams across both local and ...

The Central Engineering physical design organization at Marvell is a global team of highly-skilled engineers focused on designing next-generation chips for cloud data center and AI applications. · ...

As a Digital IC Design Principal Engineer with Marvell, you'll be a member of the Custom Silicon Engineering team. This team is a leader in large multi-die designs that are driving high compute performance and acceleration in many markets, including custom AI, 5G and 6G. · Archit ...

Job summaryAs a Digital IC Design Principal Engineer with Marvell, you'll be a member of the Custom Silicon Engineering team. · QualificationsBachelor's degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience. · Dire ...