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Principal Mechanical Thermal Engineer Analyst - Redmond, United States - Microsoft Corporation
Description
OverviewThe Microsoft Silicon team is transforming the ways people communicate, create, and collaborate through the devices and components we develop.
We're a growing team of engineers on a mission to develop revolutionary designs and provide leading edge silicon device solutions to power Microsoft computer and datacenter requirements.
Microsoft systems including Azure, Xbox and HoloLens incorporate our internally developed silicon components. Our team is creative and resourceful; we value growth and learning. We want to amplify your abilities so you can do your best work. Join us, and together we'll turn groundbreaking hardware designs into realityWe are seeking a
Principal Mechanical Thermal Engineer Analyst
to work in Microsoft Azure hardware engineering team
Microsoft's mission is to empower every person and every organization on the planet to achieve more.
As employees we come together with a growth mindset, innovate to empower others, and collaborate to realize our shared goals.
Each day we build on our values of respect, integrity, and accountability to create a culture of inclusion where everyone can thrive at work and beyond.
ResponsibilitiesResponsibilities:
The
Principal Mechanical Thermal Engineer Analyst
will be responsible for developing and performing advanced mechanical, thermal, finite element analysis for High Performance Computing (HPC) silicon designs and Microsoft systems including Azure, Xbox and HoloLens.
In this role, you will be responsible for both mechanical and thermal modelling of new packaging technology, design and development of test vehicles, and development of mechanical/thermal solutions for test, and power distribution/thermal modelling of custom silicon devices.
Specific responsibilities to include:
Develop material property database to support all the finite element analysis on substrate, silicon, interconnect, socket, etc.
Assess and characterize reliability of Integrated Circuits (IC) packages.
Develop and deliver FMEA (Failure Mode and Efects Analysis) for various technology options.
Define, design and develop test vehicles to validate Silicon, Package, System performance.
Drive mechanical and thermal analysis for Test hardware.
Design and develop package and assembly drawings to support the manufcaturring.
Drive future package architecture solutions for chiplet architetcutre with advanced packaging , silicon nodes and system designs.
Work closely with silicon and platform architects, motherboard and package designers, thermal architects and engineers, and power and performance engineers.
Drives the execution of architecture solutions across product lines or multiple product groups and across teams that account for design trends and future concepts by leveraging cross- functional expertise, industry best practices, and lessons learned from teams working across multiple product lines.
Drives engineering system design decisions that require collaboration between internal and external stakeholders to account for platform-specific technology decisions and develop system models based on current and anticipated feature/design needs and trade-offs.
Qualifications
Required Qualifications:
9+ years of related technical engineering experience
o OR Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience or internship experience.
o OR Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience or internship experience.
o OR Doctorate degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience.
7+ years of experience in the field of Mechanical Finite Element Analysis (FEA), Silicon-Package Platform co-design with knowledge of product development.
7+ years of experience in the field of advance packaging (2D, 2.5D, 3D, Land Grid Array (LGA), Ball Grid Array (BGA), Optical) modeling, design, development and validation.
Other Requirements:
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role.
These requirements include, but are not limited to the following specialized security screenings:
Microsoft Cloud Background Check:
This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.
Preferred Qualifications
MSEE degree with 10 years' experience in silicon packaging products development
Experience with Thermal Mechanical system design for HPC products
Foundation in advanced packaging technolgoies as it relates to mechanics
Experience with Foundry Silicon technologies and System boundary conditions
Silicon Engineering IC- The typical base pay range for this role across the U.S. is USD $133,600 - $256,800 per year.
There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $173,200 - $282,200 per year.
Certain roles may be eligible for benefits and other compensation.Find additional benefits and pay information here:
Microsoft will accept applications for the role until May 10, 2024.
Microsoft is an equal opportunity employer.
Consistent with applicable law, all qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances.
If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations ) .#J-18808-Ljbffr
