Senior design engineer - Santa Clara, CA, United States - NVIDIA Corporation

Description

Senior Logic Design Engineer, Cache Coherent Interconnects page is loaded Senior Logic Design Engineer, Cache Coherent Interconnects Apply locations US, CA, Santa Clara US, TX, Austin US, OR, Hillsboro time type Full time posted on Posted 2 Days Ago job requisition id JR We are now looking for a Senior Logic Design Engineer

A s a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency and last-level and system caches , focusing on such tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure, supporting verification and implementation.

This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence.

We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.

As a member of our core CPU team, you'll own and be responsible for crafting and timely delivery of a specific unit on the chip.

Day to day tasks include:
writing readable high performance and low power RTL, Synthesis and Timing closure, and design documentation.

Collaborate with our verification team to verify the correctness of your unit.

Work with implementation to achieve your timing, area, performance and power goals.

Assist with timing closure of super units.

Master's Degree in Electrical Engineering, Computer Engineering or Computer Science or equivalent experience.

8+ years of experience in processor or other related high performance semiconductor designs.

Verilog expertise required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.

Your successful track record of mentoring junior engineers and interns a huge plus.

A strong background in computer architecture , cache coherency or high speed interconnects is highly desirable.

Are you creative and autonomous? NVIDIA accepts applications on an ongoing basis.

As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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