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    Physical Design Engineer - San Jose, United States - ACL Digital

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    Description

    Position: Physical Design Engineer

    Location: San Jose, CA / Austin, TX

    Job Description:

    • Deep understanding of the concepts related to synthesis, place & route, CTS, timing convergence, IR/EM checks and signoff DRC/LVS closure.
    • closely with the Design, DV, Implementation team to define low power vectors, generate early and signoff power data using PTPX or any other low power tool.
    • power data and work closely with PD and design team to optimize for low power and improve overall PPA.
    • in enhancing low power flows, work with tool vendors to address any power-related tool or flow issues.
    • skills in one of the scripting languages, Shell/TCL/Perl/Python
    • with correlating pre-silicon power estimates with post-silicon measurements is plus.
    • Running EMIR on Chip level will be a big boost as well, Redhawk and RHSC experience preferred..

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