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    Sr Digital Engineer - Lincoln, United States - Renesas

    Renesas
    Renesas Lincoln, United States

    6 days ago

    Default job background
    Description
    Job Description
    Interpreting requirements specifications to develop digital designs from the block level to top-level system for Dialog's mixed-signal IC products. Design verification and developing advanced verification methodologies. RTL Design for low power products. Contribution to innovation of designs approaches and methodologies.

    • Design of optimized digital blocks meeting functional, cost and low power constraints and ensure spec compliance.
    • Take over technical leadership for subsystems or for complete digital system and drive from specification to production ramp.
    • Develop TCL scripts and design constraints to perform synthesis, DFT insertion and static timing analysis.
    • Support DFT strategy and implementation.
    • Verification planning, feature extraction and verification test case development.
    • Interface with P & R for Digital handoff and post layout verification.
    • Develop test vectors for production test.
    • Instigate review meetings with Design Engineers.
    • Perform physical silicon device evaluation where necessary.
    • Develop workaround solutions where necessary to overcome device errata including documentation.
    • Support RFQ process where necessary.
    • Coach and mentor less experienced team members.
    Qualifications
    【Must】

    ・Degree level qualification in Electronics Engineering or a related discipline typically required

    ・English:
    Business Level

    【Want】

    ・Typically 5 – 8 years experience

    ・Experience working in semiconductors ideally PMIC or Audio with focus on mixed signal integrated circuits and low power digital design techniques

    Fluent in either (System) Verilog or VHDL RTL coding and ASIC design methodology

    ・Proven ability to optimize and develop design architecture from chip inception to compliant netlist

    ・Proficiency in developing block and top level timing constraints for STA and P & R sign off

    ・Experience of scan insertion and ATPG generation

    ・Technical expert of industry standard tools and procedures

    ・Ability to work with minimal instruction – either independently or collaboratively

    ・Ability to make good judgement in selecting method/technique for obtaining solutions

    ・Able to confidently share own expertise and work to colleagues and customers

    ・Able to make significant contribution to projects, programs and business initiatives through creativity and ingenuity

    ・Results-oriented and able to deliver on-time under a tight schedule

    ・Ability to work both independently and part of a team

    ・Flexible to undertake occasional international travel at short notice

    ・Ability to propose innovative solutions

    ・Japanese:
    Business Level

    Additional Information
    We are expanding our product portfolio mainly on PMIC and GDU, in both Automotive and Consumer markets. We are looking for an engineer who is familiar with digital front-end design. Experience in the mixed-signal products, especially on PMICs and GDUs is a plus.
    ルネサスは「人々の暮らしを楽(ラク)にする」技術で持続可能な将来を築いていく日本を代表する半導体企業です。自動運転やIoTなど多様な分野において、先進的な製品やソリューションを提供しています。当社の製品は、世界中の主要な電子機器メーカーに採用され、日々の暮らしに欠かせない身の回りのあらゆる電子機器に使用されています。 当社では世界25カ国の製造・開発・販売拠点において20,000人以上の従業員が働いています。グローバルチームとして、すべての従業員が、行動指針である「Renesas Culture」をもとに、互いに学習、協力、成長、目標に向けて前進しながら、日々さまざまな課題解決に取り組んでいます。 当社を取り巻く環境は近年の活発な大型M&Aを含めて、他に類を見ないほどダイナミックに動いています。今後もインフラやデータエコノミー関連の急成長市場でのシェア拡大や、産業/IoTや自動車分野でのプレゼンス強化を図ります。変化の激しい中、グローバルチームの一員として、私たちと一緒に持続可能な将来を築いていただける方をお待ちしています。

    #J-18808-Ljbffr
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