TPU RTL Design Engineer, Networking and Inter-Chip-Interconnects - Sunnyvale
1 week ago

Responsibilities
- Work independently and collaboratively to create and review ASIC/SoC subsystem design architecture and microarchitecture specifications for different elements in the network stack.
- Develop SystemVerilog RTL to implement logic for ASIC/SoC products according to established coding and quality guidelines.
Job description
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