Processor ASIC RTL Design Engineer - San Diego
3 weeks ago
Job summary:
A variety of high performance, low power Hexagon/NPU cores are at the heart of Qualcomm's multi-tier mobile SOC.
- This position involves in-depth understanding of the ASIC design flow from RTL to GDS2 and the challenges posed by advanced technologies.
- The successful candidate will possess detailed understanding of RTL design, synthesis static timing analysis PLDRC clock domain crossing and low power techniques.
Responsibilities:
- Work with system architecture team to define micro-architecture documentation for various blocks in Hexagon/NPU and sub-system
- Create designs for multiple logic blocks
Job description
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