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    Test Engineer - Austin, United States - Ericsson

    Ericsson
    Ericsson Austin, United States

    4 days ago

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    Description
    Description

    Grow with us

    Location:
    Austin, Texas. This is not a position open for remote work.


    About This Opportunity:

    Ericsson Radio and Baseband Products have our ASICs as their backbone, and our challenge is to craft and deliver these ASICs so that our 5G leadership position in the market accelerates.

    Our ASICS are challenging when the combination of size/complexity, power, performance targets, leading process node technology, and innovative design methodologies are considered.

    We are seeking a Senior Test Engineer to join us and be a part of a new ASIC test team.

    This role will be integral to this test team and will be instrumental in all aspects of test strategy and silicon debug.

    Your efforts will ensure that the final ASIC achieves the program goals as we challenge the best in the world to extend our leadership position


    What You Will Do:


    • Develop and implement test methodologies for Ericsson ASICs which involves analyzing chip specifications and understanding functional requirements to ensure comprehensive coverage of the chip's functionality.
    • Collaborate with colleagues and vendors on ATE test HW development by providing design requirements and reviewing schematics and layout for probe card, loadboard, socket, thermal control interface, etc.
    • Debug test programs on ATE required for qualification, characterization, and production
    o Develop test method code for Scan, memory BIST & repair, LBIST, Functional, etc.
    o Test flow development, including test numbering, power binning, high-voltage stress, etc.
    o Perform pattern conversion of WGL, STIL, VCD and eVCD formats to ATE
    o Test program revision control using GIT
    Requisite Skills and Experience:


    • Expansive experience in semiconductor test of sophisticated ASICs or SOCs
    • Possess expert knowledge Advantest V93K / V93000 (preferred) or Teradyne Ultraflex
    • Thorough knowledge of HSSI (PCIe 5+, CPRI) or high-speed AD/DA test techniques
    • Comprehensive understanding of Scan, MBIST, LBIST, SERDES, and eFuse IPs
    Desirable Skills and Experience:


    • Linux, Java C++, Python, Perl, Ruby, Origen
    • Data analysis techniques using MS Excel, JMP, YieldExplorer, SiliconDash, etc.
    • Knowledge of IEEE standards 1149.1, 1149.6, , 1500, 1687, 1838
    • Streaming Scan Network (SSN), scan diagnostics, failure analysis techniques
    • Test of 2.5D and 3D System-in-Package (SiP), chiplets, UCIe, etc.
    • PCB / schematic design including SI and PI knowledge
    • RF test
    • Verilog, SystemVerilog, VHDL, UVM, or similar
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