Technical Director, Test Development Engineering - Irvine - Celero Communications, Inc.

    Celero Communications, Inc.
    Description

    Technical Director, Test Development Engineering


    Irvine, CA

    In this role, you will be responsible for Test Development Engineering for Celero Communications leading edge DSP products working closely with our design, validation, and systems engineering teams as well as key technology and manufacturing suppliers. You will be hands‑on to drive the complete mixed signal ATE solutions. You will also be a leader to define strategy and methodologies, and build the team and necessary infrastructure.

    Responsibilities

    • Own test engineering solutions across all new product phases including test development, new silicon bring‑up, customer sampling, qualification, characterization, and release to high‑volume manufacturing.
    • Lead all aspects of the test solution including software, tester equipment, PCBs, mechanical fixturing, and probe hardware.
    • Develop test strategy and methods and create comprehensive product Test Plans.
    • Participate in new product core team and testability, DFT reviews.
    • Partner with Design Engineering to assure test coverage and product quality while achieving test time targets.
    • Correlate ATE with bench design validation test results.
    • Characterize product and ATE solution for high volume production.
    • Coordinate with hardware, technology and subcon partners to drive NPI test release and volume ramp.

    Requirements

    • Bachelor's degree in electrical engineering or related fields and 10+ years related experience. Master's degree preferred.
    • Expertise in test program development on the Advantest 93K and/or Teradyne Uflex tester platforms.
    • Experience in mixed signal ATE test development for complex SOC devices with high‑speed ADC, DAC and SERDES.
    • Solid understanding of Scan, MBist and loop‑back test methodologies.

    Preferred Qualifications

    • Familiarity with test bench equipment such as Network Analyzers and Sampling Oscilloscopes.
    • Hands‑on at‑speed wafer probe experience strongly desired.
    • Experience with schematic capture, PCB layout, and 2D/3D CAD software.

    Salary Range


    $150,000 - $250,000 Base Annually
    The final offer will be determined based on job‑related skills, experience, qualifications, and location.

    Equal Employment Opportunity


    As set forth in Celero Communications, Inc.'s Equal Employment Opportunity policy, we do not discriminate on the basis of any protected group status under any applicable law.


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