Senior Design Verification Engineer - Austin, United States - NXP Semiconductors

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    Engineering / Architecture
    Description

    R Senior Verification Engineer

    This vacancy is within the MME MCU/MPU Digital IP team we develop best-in-class digital IPs for Automotive businesses and/or Advanced microcontrollers in NXP which offers sensor and processing technology that drives all aspects of the secure connected cars of today and the autonomous cars of tomorrow.

    As a part of MCU/MPU Engineering, a central design organization within NXP, developing products for multiple business lines in Automotive, Internet of Things (IoT), Networking, and Radio Frequency products, with expertise in hardware engineering, including architecture, IP, and full SoC Design.

    MME's Digital IP team produces design solutions covering the very wide range of SoCs required by the business lines. The team is challenged to produce industry-leading solutions covering very cost-sensitive, low-power devices to highly integrated, high-performance, multi-cohort devices compliant with the latest automotive and industrial safety and security standards.

    Job Summary:

    • Verification planning;
    • Verification test bench development and implementation;
    • Development of verification test bench components such as drivers, monitors, and response checkers as well as use of most advanced UVM VIPs;
    • Development of direct and constrained-random stimulus;
    • Understands and analyzes RTL code, functional, and assertion coverage results;
    • Understand and Develop functional coverage;
    • Understands and develops system Verilog assertions;
    • Understands and implements formal verification methods;
    • Strong skills in debugging, failure re-creation, and root cause analysis
    • Applicant should have efficient debugging and logic skills. Familiarity with major simulation and debug tool vendors is a plus.

    Key Challenges:

    • A zero-defect mindset is a key enabler and guides on technical issues faced by the verification team
    • Mentor a small team of engineers

    Cross-functional aspects:

    • The ideal candidate will partner with local and global SoC and IP developers to drive best practices with a target of ongoing productivity improvement.
    • Outstanding problem-solving and analytical skills

    Job Qualifications:

    • BSEE: 5+ years experience in the Semiconductor industry
    • MSEE: 3+ years experience in the Semiconductor industry
    • PhD: no additional experience in the Semiconductor industry required
    • Knowledge of protocols such as Ethernet/802.3, PCIe, MIPI, PHY IPs, etc
    • AMBA, CHI, ACE, AXI bus protocols
    • VHDL/Verilog/System Verilog
    • OVM/UVM, Class-based verification methodologies
    • Formal verification methodologies, AVIP
    • Test pattern debugging and testing for verification and automatic testers
    • Low Power intent verification using CPF, UPF
    • Scripting - Python, Perl, UNIX/LINUX
    • FPGA/Emulation/Prototyping using HAPS/Palladium/Zebu would be an additional advantage
    • Power management understanding
    • Functional, Code Coverage methodologies

    Job location:

    Austin, TX. This is a hybrid role where you will be in the office 2-3 days a week and then work from home the remaining days. This is NOT a remote position, so relocation to Austin would be required if you are not a local candidate.