Senior Design Verification Engineer - Burlingame

We have an opportunity for · An outstandingly hardworking design verification engineer who will enable us to produce fully functional first silicon for IP designs. · This role will involve all phases of pre-silicon verification including establishing DV methodology test-plan dev ...

We have an opportunity for an outstandingly hardworking design verification engineer. As a member of our wide-ranging group, you will have the rare and extraordinary opportunity to craft upcoming products that will delight and encourage millions of Apple's customers every single ...

+Job summary · Do you love working on challenges that no one has solved yet and changing the game?This role is for a DV engineer who will enable us to produce fully functional first silicon for IP designs. · +Study design specification and create test planDevelop infrastructure i ...

Lead / Senior Verification engineer with 5+ years of experience in ASIC / SoC / IP Verification and strong experience in SystemVerilog and UVM verification methodologies. · ...

The Verification & Validation System Engineer will delve deeply into component and subsystem designs to develop and define verification approaches and types, · Develop and define verification approaches and types using a clearly defined Requirements Verification Compliance Matrix ...

We envision millions of people living and working in space for the benefit of Earth. Join our team of problem solvers as we add new chapters to the history of spaceflightThis role is part of TeraWave,a satellite communications network designed to deliver symmetrical data speeds a ...

The Verification & Validation System Engineer will delve deeply into component and subsystem designs to develop and define verification approaches. · ...

We envision millions of people living and working in space for the benefit of Earth. We're working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, · Develop and execute comprehensive verification plans for FPGA and AS ...

· <li Design constrained-random stimulus generators self-checking verification environments Develop functional coverage models to ensure completeness qualification skills include: B.S. in Electrical Engineering Computer Engineering or related field with 5 years experience in dig ...

+This role is part of Blue Origin's Emerging Systems Business Unit, which will shape the future of our in-space infrastructure capabilities. · The development, management, and maintenance of system and subsystem requirements for the TeraWave satellite communications network · Est ...

We envision millions of people living and working in space for the benefit of Earth. We're working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. · ...

· ASIC Verification Engineer/ Principal Verification Engineer for 12 months in El Segundo, CA. · BSEE or BSCS degree; MSEE preferred. · Candidate must be a U.S. citizen and able to qualify for DoD security clearance. · ...

We are seeking an experienced ASIC Verification Engineer/Principal Verification Engineer to join our team. · Duration: 12 months · Must have Active Secret Clearance. · ...

We are looking for a Software Verification Engineer to join our team. In this pivotal role, you will be expected to leverage your extensive experience to tackle complex technical challenges and drive innovation within the team. Your proactive approach and problem-solving skills w ...

The Simulation Test Verification And Validation Engineer designs implements and operates integrated test ecosystems spans Software-in-the-Loop HITL simulation environments including Joint Simulation Environment JSE role requires strong software engineering skills develop test har ...

Hermeus is a high-speed aircraft manufacturer focused on the rapid design, build, and test of high-Mach and hypersonic aircraft for the national interest. The Simulation, Test, Verification and Validation Engineer is responsible for designing integrated test ecosystems spanning s ...

We are looking for a senior Design Verification Engineer with strong hands-on expertise in UVM-based verification. · 7-10 years of ASIC / SoC design verification experience · Expert-level proficiency in SystemVerilog and UVM methodology · ...

The product integration and verification group is seeking a highly motivated and energetic Hardware Verification Engineer with a background in digital hardware technology test methodology and/or product verification. · ...

We are looking for a senior Design Verification Engineer with strong hands-on expertise in UVM-based verification. · 7 10 years of ASIC / SoC design verification experience · ...

The Model-Based Verification & Validation (V&V) Engineer will support software certification efforts for flight-critical control systems.This role focuses on model-based testing, requirements traceability, and coverage analysis using MathWorks toolchains to ensure compliance with ...