Integrated Circuit Design Engineer with Security Clearance - Glen Burnie, MD, United States - Associates Systems LLC

    Default job background
    Manufacturing / Mechanical
    Description
    All Qualified Resumes Will Be Responded to in 24 Hrs or Less US Citizen willing to submit for a DOD Clearance
    All work is on-site AForge offers a full suite of Benefits: 100% medical, Dental, 401k, PTO, and Holiday compensation

    Required Education:
    Bachelor's degree in Electrical Engineering or related field with 14 years of experience in either Analog, Digital or Mixed Signal Circuit design (12 years with MS or 9 years with a PhD) Required Skills:


    • Solid understanding of circuit design theory; extensive hands-on custom circuit design experience
    • Working knowledge of the IC design flow including schematic capture, simulation, layout and physical verification (DRC/LVS)
    • Proficiency with modern IC design tools (preferably Cadence Virtuoso) for schematic capture, circuit simulation, and custom layout; physical verification using Assura or Calibre
    • Ability to oversee all phases of IC design from specification, to design and tapeout
    • Good understanding of IC manufacturing and testing processes
    • Experience with product validation and testing
    • Strong problem solving and analytical skills
    • Ability to meet tight deadlines and milestones according to program schedule
    • Excellent communication skills, able to efficiently disseminate information to leadership and respective working group
    • Able to obtain and maintain a Top-Secret clearance per business requirements
    US Citizenship is a requirement for this

    Desired Skills:

    • Design chip lead with a proven record of successful tapeouts; ability to design sub-blocks and perform chip level integration
    • Create and maintain chip design schedule, and meet tight deadlines in accordance with the overall program schedule
    • Create test plans, supervise product testing, and collaborate with the test team
    • Microwave engineering background; solid understanding of transmission line theory and impedance matching techniques
    • Electromagnetic modeling background with commercial tools, such as HFSS, CST, Clarity
    • Understanding of combinatorial and sequential logic; experience with custom logic gates, latches, flip-flops, clock synthesis and distribution and related issues
    • Programming experience using an objected oriented language like Python or C++
    • Scripting experience with SKILL
    • Knowledge of Quantum Information or Quantum Mechanics
    • Experience with low-temperature experimental measurements
    • Familiar with the engineering product life cycle model #CJ