Field-Programmable Gate Arrays Engineer - Melbourne

Only for registered members Melbourne, United States

1 week ago

Default job background
Proficiency with FPGA and SoC design and development, including: · Synchronous Design · Timing Closure · Vivado / Vitis · Simulation · IP Integrator / Block Design · HDL proficiency is also a must, particularly understanding of: · VHDL / Verilog / SystemVerilog · Desired Competen ...
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