Lead Principal Engineer – NPU RTL Architecture - Mountain View, CA

The Principal Engineer, RTL Design within the NPU Hardware & Software organization, is a senior individual contributor role for an engineer with deep expertise in RTL design and development for complex digital systems, including neural processing units (NPUs) or similar advanced ...

We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices using the RISC-V Architecture. · This is where you come in.As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-ar ...

We are hiring talented engineers for CPU RTL development targeted for high performance, low power devices using the RISC-V Architecture. As a CPU Micro-architecture and RTL Design Engineer, you will work with chip architects to conceive of the micro-architecture, and also help wi ...

We are hiring talented engineers for RISCV CPU RTL development targeting high-performance low-power devices. · Explore performance and power optimization opportunities in collaboration with the CPU modeling team. · Develop high-level architecture and microarchitecture specificat ...

We are hiring talented engineers for RISCV CPU RTL development targeting high-performance low-power devices.In this role you will contribute to architecture and product definition and be responsible for microarchitecture and RTL execution of CPU system features. · ...

· Company: · Qualcomm Technologies, Inc.Job Area: · Engineering Group, Engineering Group > CPU EngineeringGeneral Summary: · We are hiring talented engineers for RISCV CPU RTL development targeting high-performance, low-power devices. In this role, you will contribute to archite ...

Microarchitect & RTL Design Engineer | Hybrid in Mountain View, CA · Acceler8 Talent is seeking an experienced Microarchitect & RTL Design Engineer to join a well funded startup whose hardware promises to drastically change the economics of compute for the worlds' largest models. ...

We are seeking an experienced Microarchitect & RTL Design Engineer to join a well funded startup whose hardware promises to drastically change the economics of compute for the world's largest models. · Bachelor's degree in Electrical Engineering, Computer Engineering, or equivale ...

A well-funded startup seeks an experienced Microarchitect & RTL Design Engineer to join their team. · ...

+Dice is the leading career destination for tech experts at every stage of their careers. Our client, Goldenpick Technologies LLC, is seeking a Principal RTL Design Engineer with deep expertise in RTL design and development for complex digital systems. · ...

Microarchitect & RTL Design Engineer | Hybrid in Mountain View, CA · Acceler8 Talent is seeking an experienced Microarchitect & RTL Design Engineer to join a well funded startup whose hardware promises to drastically change the economics of compute for the worlds' largest models. ...

Role: Principal Engineer, RTL Design · Location: Mountain View, CA (Onsite) · Job Type: Contract · Project description · The Principal Engineer, RTL Design within the NPU Hardware & Software organization, is a senior individual contributor role for an engineer with deep expertise ...

The Principal Engineer will lead the design and implementation of complex RTL blocks, modules, and subsystems using Verilog/SystemVerilog for NPU architectures. · He/She will drive architectural and RTL decisions to optimize performance, power efficiency, · and area (PPA) for AI ...

The Principal Engineer, RTL Design within the NPU Hardware & Software organization is responsible for leading technical initiatives in architecture design implementation validation of critical NPU subsystems used in ADAS autonomous driving and in-vehicle AI applications. · ...

The Principal Engineer, RTL Design within the NPU Hardware & Software organization is a senior individual contributor role for an engineer with deep expertise in RTL design and development for complex digital systems including neural processing units NPUs or similar advanced comp ...

The Principal Engineer will lead the design and implementation of complex RTL blocks for NPU architectures. They will collaborate with architects to define specifications and translate requirements into robust solutions. The role requires expertise in Verilog/SystemVerilog and ED ...

The Principal Engineer, RTL Design within the NPU Hardware & Software organization, is a senior individual contributor role for an engineer with deep expertise in RTL design and development for complex digital systems. · Lead the design and implementation of complex RTL blocks, m ...

The Principal Engineer will lead the design and implementation of complex RTL blocks, modules, and subsystems using Verilog/SystemVerilog for NPU architectures. · ...

Role: Principal Engineer, RTL Design · Location: Mountain View, CA (Onsite) · Job Type: Contract · Project description · The Principal Engineer, RTL Design within the NPU Hardware & Software organization, is a senior individual contributor role for an engineer with deep expertise ...

The Principal Engineer is a senior individual contributor role for an engineer with deep expertise in RTL design and development for complex digital systems. · ...