- MSEE & 10+ years of experience in DFT refocused positions.
- Experience leading teams of Engineers (FTE or contractors) or managing external development partners (ideally working under a JDM model).
- Expertise in defining scan test plans, BIST (memory, logic and IOs), fault modeling, ATPG and fault simulation.
- Excellent analytical skills in verification and validation of test patterns and logic on complex and multi-million gate designs.
- Have good exposure to cross functional areas including RTL & clocks design, STA, place-n-route and power, to ensure we are making the right trade-offs.
- Experience in Silicon debug and bring-up on the ATE with an understanding of pattern formats, failure processing, and test program development.
- Strong programming and scripting skills in Perl, Python or Tcl desired.
- Experience
- Exceptional written, oral and interpersonal skills.
- A desire to solve complex engineering problems
- Strong knowledge of Tessent flows would be highly beneficial.
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Senior Lead DFT Design Engineer
1 day ago
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Senior DFT Engineer
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Physical Design Engineer
1 day ago
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Physical Design MTS
1 day ago
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Senior DFT Engineer
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Oho Group Ltd Mountain View, United StatesDFT Engineer - all levels. · A RISC-V start up is looking for DFT Engineers of all levels. We have roles for all levels from Engineer to Senior and through to Lead/Manager positions. · The positions are available across Mountain View CA , Austin TX, Portland OR, Fort Collins CO ...
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Production Supervisor
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Applications Engineering, Sr Director
5 days ago
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Sr. Manufacturing Technical Manager, AME
3 weeks ago
Amazon Services LLC Sunnyvale, United States Full timeAmazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of , Inc., originally creating the best-selling Kindle family of products. Since then, we have produced groundbreaking ...
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Lightmatter Mountain View, United StatesAnalog / Mixed-Signal IC Design EngineerLightmatter builds chips for artificial intelligence computing. Our architecture leverages the unique properties of light to enable fast and efficient inference and training engines. If you're a collaborative engineer or scientist who has a ...
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Lightmatter Mountain View, United StatesJob Description · Job DescriptionAnalog / Mixed-Signal IC Design Engineer · Lightmatter builds chips for artificial intelligence computing. Our architecture leverages the unique properties of light to enable fast and efficient inference and training engines. If you're a collabora ...
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Lightmatter Mountain View, United StatesAnalog / Mixed-Signal IC Design Engineer · Lightmatter builds chips for artificial intelligence computing. Our architecture leverages the unique properties of light to enable fast and efficient inference and training engines. If you're a collaborative engineer or scientist who h ...
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Principal Static Timing Analysis
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Microsoft Corporation Mountain View, United StatesMicrosofts custom silicon design team is developing some of the highest performance, most ambitious chips in the industry. The Physical Design team is looking for Principal Static Timing Analysis (STA) Engineer to join us as we continue to build a world-class team and methodology ...
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Applications Engineering, Sr Director
3 weeks ago
Synopsys Sunnyvale, United States· Senior Director Applications Engineering · 50486BR · USA - California - Mountain View/Sunnyvale · Job Description and Requirements · In this role, we are looking for a dynamic leader to lead the Applications Engineering team for Hardware, Analytics and Test BU in Synopsys. ...
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Sr. ASIC Design Engineer, DDR IP
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Sr. Manufacturing Engineer
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Senior Digital Integration
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Senior PCB Design Engineer
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Sr. Manufacturing Engineer
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Pacific Defense Sunnyvale, United StatesJob Description · Job Description** Due to the classified nature of our work, U.S. citizenship is required. Candidates must be willing to obtain and maintain a DoD Security Clearance. · Location: Sunnyvale, CA · About Us · Pacific Defense is a leading developer of advanced RF an ...
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Senior RFIC Design Engineer
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Apple Sunnyvale, United StatesSummary · Posted: May 31, 2024 · Role Number: · Would you like to join Apple's growing wireless silicon development team? The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless organization is responsib ...
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Senior RFIC Design Engineer
2 weeks ago
Apple Sunnyvale, United StatesSenior RFIC Design Engineer · Sunnyvale,California,United States · Hardware · Would you like to join Apple's growing wireless silicon development team? The wireless RFIC team architects, designs, and validates radio transceivers integrated into complex wireless SoCs. Our wireless ...
DFT Lead - Mountain View, United States - Acceler8 Talent
Description
DFT Lead - AI Hardware
Acceler8 Talent is seeking a DFT Lead to join an extremely well funded start-up building processors for Generative AI applications that are substantially more efficient and powerful than anything on the market today.
Founders by highly respected engineers with deep experience on both the hardware and software side of machine learning and with deep networks in the AGI space, this company's goal is to become the compute platform for companies building & running GenAI models.
Requirements
The position will be hybrid from Mountain View (3 days on-site) and they are offering a package consisting of competitive base salary + stock options.
Please apply here or contact Luke at to hear more.