Performance Validation Architect/Lead - Folsom, United States - Intel

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    Performance Validation Architect/Lead page is loaded
    Performance Validation Architect/Lead

    Apply locations US, California, Folsom US, California, Santa Clara time type Full time posted on Posted 2 Days Ago job requisition id JR


    Job Details:

    Job Description:


    Are you passionate about disrupting the industry with your innovation? Working with a diverse group? Influencing the outcome? If so, then XSE (Xe Silicon Engineering) Organization has an opportunity for you.

    We are responsible for delivering industry-leading GPU (3D, media, compute, and display) hardware, intellectual property (IP) blocks and system-on-a-chip (SoC) products for discrete graphics and throughput computing.

    We strive to lead the industry through continuous innovation and world-class engineering.

    We work closely with partners across Intel and we are looking for a PE/Senior Engineer to join us as a Pre-Silicon Performance Verification Architect/Lead.

    This is a Principal Engineer/Senior role, which is a hands-on, highly technical individual contributor role.

    Your responsibilities will include but not limited to:
    Define and enhance methodologies for pre-silicon validation of high complexity SoCs to attain performance targets

    Developing understanding of key workloads and the impact of the design features on performance

    Interact closely with the architecture and design teams, influencing product definition, implementation and validation

    Create, define and develop system validation environment and test suites

    Developing & overseeing Pre-Si verification plans for IP, Sub System and SOC

    Work with architects on feature scoping and approvals, feasibility studies, design tradeoff analysis

    Design and Testplan Reviews of your design, understand the inter-operability with interfacing designs.

    Close collaboration with planning teams, architects, validation, PostSi bring up teams


    Qualifications:
    Candidate must have a Masters Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 15+/10+ years of experience

    Experience working on multiple complex SoCs as a verification lead/architect

    Track record of developing complex verification collaterals quickly and solid simulation debug skills

    Relevant ASIC design/validation experience in front end processes including RTL functional, performance and power verification

    Good understanding of CPU and GPU architecture along with memory controllers is a requirement

    Understanding of graphics workloads, games and how they micro-architectural features impact their performance is a must

    Proven track record in SoC verification with expertise in computer architecture, memory technologies etc

    Hands-on verification experience and high-proficiency using SystemVerilog and OVM/UVM is a plus

    Knowledge of scripting

    Knowledge of industry standard Protocols, IO interconnect, memory controllers, GPU architecture is preferable

    Strong leadership skills, while being highly energetic and motivated, independent and self-driven


    Job Type:
    Experienced Hire


    Shift:
    Shift 1 (United States of America)


    Primary Location:
    US, California, Folsom


    Additional Locations:
    US, California, Santa Clara


    Business group:


    The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, all in ones.

    Working with our partners across the industry, we intend to deliver purposeful computing experiences that unlock people's potential - allowing each person use our products to focus, create and connect in ways that matter most to them.

    As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products.

    As a result, we are able to fuel innovation across Intel, providing an important source of IP and scale, as well as help the company deliver on its purpose of enriching the lives of every person on earth.


    Posting Statement:


    All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

    Position of Trust

    This role is a Position of Trust.

    Should you accept this position, you must consent to and pass an extended Background Investigation, which includes (subject to country law), extended education, SEC sanctions, and additional criminal and civil checks.

    For internals, this investigation may or may not be completed prior to starting the position. For additional questions, please contact your Recruiter.


    Benefits:
    We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.

    Find more information about all of our Amazing Benefits here:

    Annual Salary Range for jobs which could be performed in

    US, California:
    $186,760.00-$299,166.00

    S

    al

    ary range dependent on a number of factors including location and experience.
    Work Model for this Role

    This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

    In certain circumstances the work model may change to accommodate business needs.

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    Intel provides reasonable accommodation to applicants and employees. For more information on our Reasonable Accommodation process, please clickhere .

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