External Technology Integration Engineer - Phoenix, AZ

Only for registered members Phoenix, AZ, United States

1 month ago

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+ Lead the technical integration of external memory and/or foundry silicon technologies into Intel's advanced packaging platforms
+ Drive comprehensive chip-to-package interaction (CPI) assessments across Si backend fab, bump, singulation, assembly, and test domains
+ Qualify breakthrough foundry Si/memory technologies and establish innovative Si far back-end and bump design rules + Orchestrate complex technical programs with multi-disciplinary stakeholders to deliver game-changing results
+ Define package performance specifications and achieve technology certification through strategic test vehicle design layout and data collections
+, Pioneer research on materials and properties to solve complex CPI failure mechanisms
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