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Staff Integration Engineer
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Senior Integration Engineer
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Senior Integration Engineer
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Senior Systems Integration Engineer
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Intel Hillsboro, United StatesIntel · Senior Physical Design Layout Methodology and Integration Engineer · Hillsboro , · Oregon · Apply Now · We are the full chip SoC Integration team looking for Senior Layout Methodology and Integration development Engineer to work on Test Chip Lead Vehicles, which are ...
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Senior Software Application Engineer
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Director of Process Engineering
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Director of Process Engineering
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Sr Manager, Software Engineering
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Senior Software Engineer
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Intel Corporation Hillsboro, United States Full timeJob Details: · Job Description: · Intel's pursuit of Moore's law drives constant state of the art innovations in Process and Packaging areas. Intel and the industry are entering the era of advanced packaging and Intel has brought in breakthrough advances in packaging through EMIB ...
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Senior Storage Engineer
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Sr Systems
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Applications Engineer
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Design Project Manager
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Materials Engineering Scientist
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Senior Process Engineer
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Senior Mechanical Engineer
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Construction Coordinator
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Wafer Level Packaging Research Integration Engineer - Hillsboro, United States - Workday
Description
Job Details:
Job Description:
Drives design, simulation, development, and implementation activities for scientific research projects leveraging device physics and electromagnetics theory, thermomechanical analysis and simulations, materials, chemistry, and process innovations to drive research on novel devices, packages, interconnects, circuits, and systems.
Investigates the feasibility of applying scientific principles and concepts to potential inventions and products years before landing on a product roadmap.
Develops prototypes to demonstrate proof of concepts.Designs, fabricates, and performs etest assessment of novel devices, packages, and interconnects including DC testing, RF smallsignal and largesignal characterization techniques, pulsing, and stressing.
Establishes etest methodologies, metrics, and criteria of a device based on required application specifications.Provides process solutions across different production modules including lithography, etch, diffusion, CVD, PVD, CMP, and overall systems requirements, including thermomechanical, power delivery and highspeed signaling, and cost.
Owns critical process and equipment research that enable rapid device miniaturization and the mass production of integrated circuits.Quantifies the tradeoffs between various device, circuit, and system parameters, generating and exploring novel solutions to meet and solve the demands for continued performance improvements in devices, packaging, and systems.
Develops innovative solutions to enable Intel's roadmap of future assembly packaging platform technologies.Uses handson approach to plan, setup, and execute experiments in collaboration with device, module, reliability, analytical labs, and TCAD across fabrication sites and quantifies and benchmarks experimental results with best known methods and literature/academia.
Develops and validates models and the necessary measurements to advance the understanding of device physics, packaging, and systems. Leads and manages vendor engagements to support various research and development activities across devices, packages, and interconnects. Mentors external research in academia and industry consortia to help fill Intel's internal research pipeline.Qualifications:
For information on Intel's immigration sponsorship guidelines, please see
Intel U.S. Immigration Sponsorship Information
.
You must possess the below requirements to be initially considered for this position.
Preferred qualifications are in addition to the requirements and are considered a plus factor in identifying top candidates.
Knowledge and/or experience listed below would be obtained through a combination of your schoolwork and/or classes and/or research and/or relevant previous job and/or internship experiences.
Minimum Qualifications:
Ph.
D. degree in Material Science, Chemistry, Chemical, Mechanical Engineering, or related field
2+ years of wafer fab, wafer level packaging or assembly process experience.
Preferred Qualifications:
Knowledge of statistical process control techniques, and JMP/SQL data analysis tools.
Knowledge of F/A tools such as SEM, EDX, etc.
Familiarity with fab automation systems such as MES and WS
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Oregon, Hillsboro
Additional Locations:
Business group:
As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.
Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust N/AWork Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
In certain circumstances the work model may change to accommodate business needs.#J-18808-Ljbffr
