CAD Engineer III - Phoenix, United States - PDS Defense, Inc.

    PDS Defense, Inc. background
    Description
    PDS Defense, Inc. is seeking a CAD Engineer III, in Phoenix, AZ.


    Job Responsibilities:

    Support design, layout, and analysis of electrical and mechanical systems and their constituent parts including: high-density interposers, substrates, and printed circuit board (PCB) layouts.

    This includes power, digital, analog, and RF signals across multiple dieSupport high-speed, multi-layer packaging, high-density interconnects (HDI), blind and buried vias, ball grid arrays (BGAs), RF, design for test (DFT), impedance calculations, cross talk, differential pairs, PCB stack-ups, PCB via structures, electromagnetic compatibility (EMC), material studies/selection, etc.

    Support package material characterization frequency dependent model; skin effects, smoothness, roughness, dielectric loss and dielectric constantWork with peers and the engineering team to review the artwork and drawings at different stages and at the final design review for fabrication and assemblyProvide support for multidisciplinary investigations and feasibility studies with collaboration across engineering disciplinesProvide support for interfacing to customers, subcontractors, assemblers, fabricators, consultants, and vendors/suppliers, operations, quality, supply chain, and supporting organizationsWorks on issues where analysis of situations or data requires an in-depth evaluation of variable factors

    Basic Hiring Criteria:
    Bachelor's Degree in Engineering or equivalent education and experience required

    Minimum Experience: 5 years as a PCB and/or High-Density Package Layout designer using industry standard layout tools such as Cadence Allegro & APD Knowledge of Design For Manufacturing rules of our suppliers and ensure design process matches their capabilitiesKnowledge of fabrication drawings that match the intent of the design and support the fabrication suppliers to ensure the technical intent is transferred successfullyHDI stack-ups, including use of blind & buried micro-vias, specialty RF dielectric materials, and trace width/spacing around 15um/15um down to 2um/2um or belowExperience with 2.5D devices, interposer or substrate design, flip-chip, surface mount, die stacking, package stacking, substrate stacking and other techniquesExperience using a Cadence schematic/netlist driven CAD layout processWorking knowledge of AutoCAD & BluePrint.

    Must be able to import, modify and export DXF PCB outline dataUnderstanding of layout techniques in Digital, Analog, and/or RF layoutsKnowledge of electronic packaging techniquesExperience using a CAM package for manufacturing data validation.

    Knowledge of CAM350 or Valor is preferredWorking knowledge of JEDEC /IPC design, fabrication, and assembly specificationsExperience creating assembly documentation and fabrication deliverables per company and industry standardsHigh-end FPGA package or board design experienceMust be a US PersonWork effectively individually and as part of a teamEmbrace the company culture that includes the following values and behaviors:Teamwork, execution, and communicationIntegrity, trust, customer focus, commitment, and a sense of urgency