Functional Verification Engineer - San Jose

We are looking to grow our team with an Mixed-Signal Verification Engineer.This person will help develop and implement mixed-signal verification and IC designs based on team architecture and specifications. · ...

We are looking for a Mixed-Signal Verification Engineer to help develop and implement mixed-signal verification and IC designs based on team architecture and specifications. · * Experience in Spice Simulation* Systems Verilog modeling experience* Strong understanding of both anal ...

We are looking to grow our team with an Mixed-Signal Verification Engineer. · Experience in Systems Verilog. · Working with HDL and ADC / DAC. · ...

We are looking to grow our team with an Mixed-Signal Verification Engineer This person will help develop and implement mixed-signal verification and IC designs based on team architecture and specifications.The ideal candidate will have experience in Systems Verilog and well as in ...

Develop and enhance UVM-based testbenches to verify complex designs. · ...

Develop and enhance UVM-based testbenches to verify or accelerate the simulation of complex designs at component or subsystem level. · ...

We are looking for Verification Engineers to collaborate with our team. You will drive pre-silicon RTL verification of the full chip and stay abreast with design specs. · We're looking for candidates who are well-rounded in all aspects of verification. · ...

Altera is seeking a Senior Design Verification Engineer to drive verification of complex FPGA and SoC designs from architecture through silicon validation. · ...

+Job Summary · +As a verification engineer with a knowledge of subsystems and SoCs, · +you will make valuable contributions to a team tasked with verifying the functional correctness of SoC. · Writing test plans · ...

We are seeking a Design Verification Engineer to ensure the quality at the heart of our GPU architecture. · Work with architects and designers to build verification environments and test plans. · Craft functional verification coverage strategy to ensure complete test suite implem ...

Responsible for ASIC design verification for various processing blocks within a SOC. · Develop and complete test plans for cache coherency verification of ASIC-based SoCs using UVM-based environments. · Design and implement constrained-random and directed System Verilog testbench ...

This role offers a great opportunity to be at the forefront of compiler verification, ensuring our brand-new technology maintains its premier standard. · Design industry grade C++ testsuite · Identify potential gaps in current test procedures · ...

Altera is seeking a Senior Design Verification Engineer to drive verification of complex FPGA and SoC designs from architecture through silicon validation. · ...

The FPGA Verification Engineer will own verification of entire FPGA design used in high-end router products. · Create test plans, · constrained-random verification environments, ...

Protingent Staffing has an exciting contract Design Verification Engineer opportunity with our client located in San Jose, CA. · ...

Rambus seeks an exceptional Lead Verification Engineer to join its Security team in San Jose/San Francisco. The candidate will participate in the verification of secure ASIC cores developed by Rambus Security Division. · Partner closely with architecture and design teams · Design ...

We are looking for humble geniuses who believe that engineering has the potential to make the impossible possible; innovators who are not only inspired by technology and innovation but also perpetually driven to design develop and test as a trusted partner for Fortune 500 custome ...

A GPU Design Verification Engineer will ensure quality at the heart of our GPU architecture. · Work with architects and designers to build verification environments and test plans · Craft functional verification coverage strategy to ensure complete test suite implementation · ...

We are seeking a Verification Engineer to help bring cutting-edge FPGA and ASIC designs to life for various target customers. · ...

We are seeking a results driven Pre-Silicon Verification Engineer with extensive experience in developing UVM test benches and a passion for leveraging artificial intelligence to redefine the verification landscape. · Contribute to the application of machine learning techniques a ...