DFT Lead - San Jose

Only for registered members San Jose, United States

1 week ago

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Job summary

Dice is the leading career destination for tech experts at every stage of their careers Our client IT Gig LLC is seeking the following Apply via Dice today DFT Lead Long Term Responsibilities Manage DFT requirements across architecture design and product teams to ensure coverage die cost test cost and DFT integration requirements are met at the block and full chip level Define implement and validate DFT features at the FPGA full chip and sub-systems level Collaborate closely with cross functional teams to support DFT insertion synthesis scan insertion place-and-route static timing analysis timing closure power analysis during test and quantifying full chip test coverage Establish maintain DFT design insertion guidelines documents best practices for all development teams to follow Be current with emerging technologies methodologies in DFT incorporate them into the FPGA continuously improve test cost quality Work with Test Product engineers support development firmware targeted test patterns ATPG mBISTtest feature validation processes silicon debug activities Communicate project status progress chip lead engineering management Requirements/Qualifications Bachelors Masters engineering field 15+ years of DFT engineering experience through pre post silicon cycles Experience creating implementing complex FPGA/SoC architecture advanced technology nodes Expert knowledge about IJTAG JTAGtest access Streaming Scan Network compression SAF/TDF/PDF ATPG memory BIST repair logic BIST MISRs at-speed testing SoC/FPGA fault simulation quantifying full chip test coverage mode timing constraints power control during test Familiar verification silicon debug memory scan diagnostics Experience PHY high-speed IO digital communication functionality development Good understanding Verilog synthesis physical implementation STA verification methodology


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