- Responsible for script development (knowledge of Python, C++, Matlab, Excel VBA is a plus) of automated testing.
- Fine tuning DSP settings and analog circuit settings to optimize system performance
- Work with IP design team on new chip features, definitions, and bring-up
- Work with architecture team on future product definitions
- Develop test report
- Strong ability to write test automation scripts in Python
- Curious in nature.
- Comfortable in laboratory environment - High-speed test equipment oscilloscopes BERTS spectrum analyzers etc.
- Organized workflow.
- Experience creating test plans and executing to schedules
- Understanding of IEEE and OIF industry standards for SERDES and communication protocols
- Collaborate across groups to gather and share information to enhance business IP.
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Senior Staff Silicon Validation Engineer - East Fishkill, United States - Marvell Semiconductor
Description
About Marvell
Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.
At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.
Your Team, Your Impact
Group DescriptionMarvell Central Engineering (CE) develops Marvell most advanced High-Speed SerDes (HSS) IPs covering multiple applications, Switch, Automotive, Storage, Optics, etc. Acting as the engine to the company, Central Engineering provides the source of power to every business unit in Marvell system. Central System Engineering (CSE) in Central Engineering, independent of other CE functions including DSP algorithm development, circuit design, physical design, packaging, etc., is a function team responsible of validating all Marvell HSS IPs in the lab environment and supporting all Marvell business units for fast and smooth SoC production.
What You Can Expect
Work with IP designers to develop and execute post silicon validation of SERDES IP on test platform.
What We're Looking For
Bachelor's degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience OR Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience.
#LI-TM
Expected Base Pay Range (USD)
123, ,370, $ per annumThe successful candidate's starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions.
Additional Compensation and Benefit Elements
At Marvell, we offer a total compensation package with a base, bonus and equity.Health and financial wellbeing are part of the package. That means flexible time off, 401k, plus a year-end shutdown, floating holidays, paid time off to volunteer. Have a question about our benefits packages - health or financial? Ask your recruiter during the interview process.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at
