- Define and review verification and validation testplans at the integration and SOC fullchip levels.
- Verify design functionality through writing reusable testbenches, scoreboards, assertions, and assembly tests.
- Execute coverage of various use cases, then feeding back to the testplans for closure.
- Integrate controller IPs into the testbenches, then perform fullchip/cluster/integration level testing.
- Integrate and work with VIPs to stress-test our IPs for various protocols.
- Develop and maintain regressions, tools, infrastructure, and methodology.
- Functional bringup and debug on various platforms and tools.
- Run real world software use cases on emulation and FPGA. Measure performance and feedback to designers.
- Post-silicon validation bringup and production ramp.
- BS or MS in computer science, computer engineering, or electrical engineering.
- 10+ years of work experience in designing, verifying, and validating complex hardware systems.
- Solid programming skills in C/C++, Verilog, System Verilog, UVM, assembly, and Python.
- Proficient in debugging SOC, CPU, GPU, fabric, NOC, memory, various protocols like AXI, PCIE or Ethernet.
- Knowledge of advanced computer architecture and system architecture concepts.
- Experience with writing directed and random test cases.
- Experience with design verification and validation methodologies and strategies.
- Experience with power and performance modeling concepts.
- Good communication skills, and a team player.
- Able to work independently in a fast-paced team and environment.
- Deep knowledge of system architecture including CPU, GPU, fabrics, interconnects, NOC, memory sub-systems, HBM/DDR, I/O peripherals (UART/SPI), bus protocols (AXI/APB), PCIE, Ethernet, DMA, CSRs, SerDes, PHY, etc.
- Experience with system coherency verification.
- Experience with boot, reset, clock, and power management verification.
- Experience with GLS, Xprop, LEC, connectivity, sensors, Efuses, OTP.
- Experience with integrating controller IPs and VIPs. Prior work experience with vendors is a plus.
- Emulation/FPGA/firmware experience is a plus.
- Post-silicon bringup and validation experience is a plus.
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Design Verification Engineer - Chantilly, United States - Elexis Recruiting
Description
Job Description
Job DescriptionWe are seeking a Design Verification Engineer. We need ASIC Design Verification engineer with DFT Experience for our Tactical Communications business within our Communication Systems segment. The successful candidate will function primarily in an FPGA verification role, working in a cooperative team environment to verify and test embedded FPGA firmware.
Responsibilities:
Skills and Qualifications:
Experiences:
