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    Hardware Design Engineer - Laurel, United States - Leidos

    Leidos
    Leidos Laurel, United States

    1 week ago

    Leidos background
    Engineering / Architecture
    Description

    Cyber and Analytics Solutions is looking for a Mid to Senior Level Hardware Design Engineer to work on a program in Maryland.

    This mission focused program consists of a small team responsible for the full life-cycle of the design, programming, using FPGAs and embedded software, device testing and system integration support.


    Primary Responsibilities:


    Collaborate with a multi-disciplined design team (Electrical Engineers, Software Engineers and Signals Analysts) to design and integrate FPGA solutions for COTS hardware platforms incorporating Xilinx Zynq Ultrascale+ and Xilinx 5 FPGAs.

    Analyze, design, simulate, and implement signal processing algorithms in hardware description language, HDL (VHDL) based on customer requirements.


    Assist with maintainence of an HDL library of processing modules, creating new modules as needed, optimizing existing modules for speed and resource utilization as required.

    Design and implement testbenches in VHDL for code verification and validation.


    Utilize FPGA synthesis and place and route tools to implement designs for target platforms while verifying resource utilization and timing performance.

    Perform lab functional testing of completed designs.

    Provide technical support for deployed designs.


    Basic Qualifications:
    Seven (7) years' experience as a HDE in integrated circuit or microelectronic component design is required.

    Bachelor's degree in Electrical Engineering or Computer Engineering from an accredited college or university is required. Five (5) years of additional hardware design engineering experience may be substituted for a Bachelor's degree.

    TS/SCI with polygraph clearance is required.


    Preferred Qualifications:
    FPGA design

    Hardware Description Language (VHDL)

    Xilinx ISE

    Xilinx Vivado

    Mentor Graphics Modelsim

    Synplicity SynplifyPro/Premier

    Experience with digital signal processing protocols and techniques


    Original Posting Date:

    While subject to change based on business needs, Leidos reasonably anticipates that this job requisition will remain open for at least 3 days with an anticipated close date of no earlier than 3 days after the original posting date as listed above.


    Pay Range:
    Pay Range $144, $260,850.00

    The Leidos pay range for this job level is a general guideline only and not a guarantee of compensation or salary.

    Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.

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