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    Senior FPGA Manager - Bellevue, United States - JumpVine, Inc. Recruiting Services

    JumpVine, Inc. Recruiting Services
    JumpVine, Inc. Recruiting Services Bellevue, United States

    6 days ago

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    Description
    Job Description

    Job Description

    Senior FPGA Manager
    Very well-funded, mid-stage technology start-up has the immediate need for a Senior FPGA Manager. This is a hybrid role and the firm is located in the Bellevue area of Seattle.

    This key hands-on managerial position will handle designing, developing, testing and releasing SOC FPGAs associated with leading edge battery powered, handheld electronic products for public safety applications.


    Responsibilities include:

    System Architecture, FPGA SOC Architecture, FPGA RTL coding, FPGA simulation, FPGA physical design (synthesis, P&R), lab bring-up & validation and vendor interfacing.

    In this hands-on role you will lead and manage a small team of FPGA Designers as well as play a key role in interacting with the application developers, our SCRUM leader, and senior management to achieve objectives.

    The key requirement for this position is experience completing complex DSP-oriented FPGA projects quickly and efficiently in a fast-paced / start-up environment.

    This is a true "player/coach" role where hands-on design, development and testing will be a normal part of the position.

    The role will provide excellent experience in modern, handheld, FPGA/ARM SOC/RF products.

    The candidate for this position should be a recent Lead FPGA Architect and Manager of high-speed and complex DSP data path solutions, complete with extensive use of AMD-Xilinx Zync technology, ranging from software programmability of ARM-based processor to hardware programmability of an FPGA, enabling key analytics and hardware acceleration while integrating CPU, DSP, ASSP, and mixed signal functionality on a single device.

    The candidate will work closely with engineers developing the RADAR system, OS-Drivers, RADAR Module Controller Software, and Hardware, providing a key expertise from having hands-on experience in the complete life cycle of a modern FPGA combined with

    management/leadership

    experience. The candidate should have a history of successfully designing for quality, test, manufacturing, and volume.

    You will be joining a world-class team of RF, Hardware, Software, SaaS, and AI developers in an exciting new early-stage startup.

    Our client is revolutionizing the contentious and dangerous physical security procedure of a "pat-down" with an electronic "virtual search" which will be faster, safer, and more socially accepted by all parties.

    You will have significant leeway in your design project and will be able to make a huge impact on the company, business, market and societies across the globe.

    We are looking for a proactive self-starter who is passionate about developing great product designs and about the space we are in.


    Requirements for the Senior FPGA Manager:
    BSEE or equivalent experience
    6-10 years of experience, including lead technical role on multiple commercial FPGA projects
    2+ years of management / leadership experience over FPGA projects.
    Must have completed at least 2 major projects converting Matlab to RTL.
    Referenceable experience with rapid reconfiguration of an existing DSP architecture into other products.
    Expertise in modern Xilinx (AMD) FPGAs
    Expertise in Verilog / System Verilog RTL design and coding
    Xilinx embedded architecture and tool chains including synthesis, P&R and timing closure.
    Verilog / System Verilog digital logic simulation experience
    Experience with Matlab and the conversion of sophisticated mathematic algorithms to RTL.
    Experience with lab validation and HW/SW bring-up
    Excellent communication and presentation skills is a MUST
    Ability to lead and validate outside FPGA constants work products
    Ability to interface with software, FPGA and RF/Analog teams

    Additional Desirable Skills for the Senior FPGA Manager:
    Embedded ARM SOC and AXI bus experience
    Linux experience including Xilinx PetaLinux
    Digital Signal Processing experience. Algorithm and/or implementation levels
    Experience with analog electronics and ADC / DAC a plus
    Experience with scripting languages such as Python is a plus
    Knowledge of DSP and radar-based systems and architectures is a plus
    Salary / Benefits

    - competitive base salary up to $240k plus bonus potential, stock options and excellent health benefits, PTO, etc.

    Company Description JumpVine is a "hire and retention" partner, not a traditional recruiting firm. Employers productively spend their time interviewing people that have the ability to succeed. This respects the time and efforts of both prospective employers and the candidates. It also greatly minimizes the common occurrence of making bad hires.

    JumpVine incorporates the same objective model for Temp/Contract hires because a good fit matters, even if the position is short term in nature.

    Company Description

    JumpVine is a "hire and retention" partner, not a traditional recruiting firm.

    Employers productively spend their time interviewing people that have the ability to succeed. This respects the time and efforts of both prospective employers and the candidates. It also greatly minimizes the common occurrence of making bad hires.

    JumpVine incorporates the same objective model for Temp/Contract hires because a good fit matters, even if the position is short term in nature.

    #J-18808-Ljbffr

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