- Looking for a CAD/EDA engineer to support and maintain Front-End (FE) silicon design tools, synthesis setup, and constraints.
- This candidate should be familiar with common FE silicon design tools such as those used for CDC, RDC, Synthesis, FEV, and power analysis.
- This candidate should be comfortable with maintaining a FE synthesis setup, constraints, and porting this setup to new technology nodes. Experience with either Synopsys Fusion Compiler or Design Compiler is required.
qualifications:
- Experience level: Experienced
- Minimum 5 years of experience
- Education: Bachelors
skills: - CAD
Equal Opportunity Employer: Race, Color, Religion, Sex, Sexual Orientation, Gender Identity, National Origin, Age, Genetic Information, Disability, Protected Veteran Status, or any other legally protected group status.
At Randstad Digital, we welcome people of all abilities and want to ensure that our hiring and interview process meets the needs of all applicants. If you require a reasonable accommodation to make your application or interview experience a great one, please contact
Pay offered to a successful candidate will be based on several factors including the candidate's education, work experience, work location, specific job duties, certifications, etc. In addition, Randstad Digital offers a comprehensive benefits package, including health, an incentive and recognition program, and 401K contribution (all benefits are based on eligibility).
Applications accepted on ongoing basis until filled.
Qualified applicants in San Francisco with criminal histories will be considered for employment in accordance with the San Francisco Fair Chance Ordinance.
We will consider for employment all qualified Applicants, including those with criminal histories, in a manner consistent with the requirements of applicable state and local laws, including the City of Los Angeles' Fair Chance Initiative for Hiring Ordinance. -
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Silicon CAD Engineer - Mountain View, United States - Randstad USA
Description
job summary:1. Experience with Synopsys Fusion Compiler (preferred) or Synopsys Design Compiler (ok)
2. Experience working as a CAD or AE engineer, supporting Front End Silicon Design tool flows (Synthesis, CDC, RDC, lint, etc.)
3. Experience maintaining tool constraints, waivers, and TCL scripts
We're committed to a diverse and inclusive workplace and strongly encourage applicants from all backgrounds and walks of life
location: Mountain View, California
job type: Contract
salary: $ per hour
work hours: 8am to 5pm
education: Bachelors
responsibilities: