Sintegra Inc. Jobs in United States

The job involves setting up and running semiconductor automated testing equipment. · Setup and run semiconductor automated testing equipment. · Troubleshoot setup issues and communicate with support personnel to resolve them. · ...

Scope of Work: · The ideal candidate is a CAD engineer who will work with DFT and multi-functional · global teams, EDA vendors to develop Spyglass based DFT (TestMax) scan DRC · analysis scan coverage estimation flows in the RTL, developing SiliconInsight based · pattern generati ...

Job Responsibilities · Silicon Characterization: Drive post-silicon power and performance measurements for next-generation Smartphone SoCs. · Data Automation & Infrastructure: Design and maintain Python-based automation frameworks for high-fidelity workload measurements and telem ...

A semiconductor company in Westborough, MA is seeking an experienced professional for static timing analysis within the PCIe subsystem of their architecture. The ideal candidate will have 5+ years of experience, expertise in STA tools like PrimeTime, and a strong understanding of ...

We are seeking a highly organized and strategic Senior Procurement Project Manager to lead procurement operations. The ideal candidate will be a proactive problem-solver with a strong understanding of procurement best practices. · ...

We are seeking a highly organized and strategic Senior Procurement Project Manager to lead procurement operations across a diverse range of business functions including but not limited to cross-functional projects procurement performance reviews supplier events vendor management ...

We are seeking a highly skilled CAD Engineer specializing in Design-for-Test (DFT) to collaborate with global, multi-functional teams and EDA vendors. The ideal candidate will design and optimize advanced DFT flows for next-generation complex products, including: · Developing Spy ...

CPU Performance Engineer (TVC) · Role Overview · We are seeking a CPU Performance Engineer to drive the characterization and optimization of next-generation smartphone SoCs. This role combines deep technical analysis with hands-on lab work, enabling you to shape performance insig ...

Responsibilities · Perform static timing analysis (STA) for the PCIe subsystem within the Sparta architecture. · Develop, validate, and maintain PCIe-specific timing constraints (SDC) and exceptions. · Run full‑chip and block‑level STA for PCIe paths across PVT corners and operat ...

This position involves setting up and running semiconductor automated testing equipment to ensure operational documents are accurate. · The candidate will work closely with teams to resolve issues and meet test priority goals. · ...

We are seeking a highly skilled Formal Verification Engineer to define and drive formal strategies that ensure first-pass silicon success. · Define and execute the formal verification strategy for complex IP and SoC designs. · Architect robust, scalable FV environments and deploy ...

Role Overview · We are looking for a Design Verification Engineer to support SoC-level verification of advanced high-speed and security IP. This role involves close collaboration with design and architecture teams to verify complex digital systems. · Responsibilities · Develop an ...

We are seeking a highly motivated DFT Debug Verification Engineer to join our Silicon Verification team. The ideal candidate will be responsible for enabling and verifying debug features across both pre-silicon and post-silicon environments. This role requires strong expertise in ...

We are seeking an experienced and highly skilled Chip-Level / SoC-Level Design Engineer to join our innovative team.The ideal candidate will excel in RTL-to-GDSII design processes across both block-level and top-level integration. · ...

We are seeking a highly skilled Formal Verification Engineer to define and drive formal strategies that ensure first-pass silicon success. · Define and execute the formal verification strategy for complex IP and SoC designs. · Collaborate with Architecture and Design teams to tra ...

Job summary · Perform static timing analysis (STA) for the PCIe subsystem within the Sparta architecture. Responsibilities Perform static timing analysis (STA) for the PCIe subsystem within the Sparta architecture. · ...