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Feng Liu

Feng Liu

Reliability, data science, program management

Technology / Internet

San Jose, Santa Clara

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About Feng Liu:

 Expertise in reliability engineering and data analytics in data storage and microelectronic products, hardware design, integration and volume manufacturing; High level technical contributions and a proven record of creative problem solving; 80+ granted patents, 20+ publications; Apply reliability physics to design, execute, validate accelerated stress testing, reliability methodologies and models for cloud and consumer markets.

Excellent big data analytical skills gained through a diverse technical and professional background. Proficiency on data science, applied reliability statistics and predictive modeling, hardware test (ReliaSoft synthesis platform (Weibull++, BlockSim, ALTA, xFMEA))/JMP/Python data science and machine learning (pandas/numpy/matplotlib/seaborn)/ Matlab/C++/SQL/Labview/R); Cross-functional hardware development (module/system) from prototype to mass production/reliability excellency; Interpersonal, communication, leadership experience; Customer orientation, solution driven; High impact individual and task lead for complex activities. specifications in product and technology development; Driving multiple product qualification and execution with external and overseas manufacturing partners to meet reliability targets; Lead FMEA/DFR/DOE and failure analysis to identify design & reliability deficiencies and initiate solutions at various phases; Develop diverse tests/ORT/RDT to improve reliability.

Experience

Western Digital/HGST, San Jose, CA   2007 – present

HDD hardware design/reliability lead, Senior Technologist 

  • A lead design/reliability senior technologist on WD’s leading enterprise energy/microwave assisted magnetic recording (MAMR)/perpendicular magnetic recording (PMR) technology development; functions include technology design/reliability/characterization for enterprise reliability and performance requirements, define characterization plan and reliability specifications, manage testing support to validate design, work with cross-disciplinary wafer process/program/system engineering to establish technology building blocks to production;
  • Led cross functional teams on product design, reliability, testing (US/overseas), modeling, integrating various process/design modules on joint technology development for HDD products. 
  • Deliverables include HDD leading products (ePMR/MAMR/SMR) (~up to 1.2 Tb/in2) meeting stringent reliability;

Sensor technology/reliability lead for HDD products/components 

  • Successfully led WD’s CPP TMR magnetic sensor design, reliability development and qualification; Develop performance and reliability specification and testing plans for TMR reader from wafer magnetics to devices and recording systems; Defined magnetic sensor architecture, design, reliability, characterization; TMR sensor reliability prediction and failure modes analysis; Wafer fabrication and system integration, time to market launch into WD’s HDD products for multiple generations; 
  • Led magnetic sensor reliability task force to resolve sensor system/HDD reliability with complex root causes, thus success of WD’s HDD products with TMR sensor 

Seagate Technology, Minneapolis, MN        1998 – 2007

Enterprise class hard disk drive integration, Seagate Twin Cities Enterprise Drive Operation (TCO) (2003-2005)

  • Seagate PMR enterprise HDD design and reliability, focus on TMR reader, PMR and HDD system/component integration, successful launch of Seagate 1st 15K PMR enterprise HDD.  

Hard disk drive magnetic read sensor design/reliability, Seagate Recording Head Operation (RHO) (1998-2003, 2005-2007)

  • HDD magnetic read sensor design, reliability, characterization for CIP GMR sensor and CPP TMR sensor; Fundamental R&D development on CPP TMR magnetic sensor (AlOx, TiOx, MgO barriers) from theory of operation, magnetic materials research to wafer/device/system validation; design for TMR sensor reliability, identify failure modes in product design (barrier property, reader stack magnetics, design and process), define/implement reader performance/reliability characterization plan at various levels (wafer/device/HDD system), hands on testing, modeling, statistical analysis, wafer manufacturing, time-to-market HDD integration;
  • HDD longitudinal/perpendicular head design/characterization, extensive electrical, magnetic, microscopy tests and analysis to address product design validation, reliability qualification, device physics, performance/reliability root causes experiments.

Education

University of Minnesota, Twin Cities, MN 

M.S., Electrical and Computer Engineering

Washington State University, Pullman, WA

M.S., Chemical Engineering

Tianjin University, Tianjin, China

B.S., Chemical Engineering

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